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Message-ID: <20190816212129.GA22090@bogus>
Date:   Fri, 16 Aug 2019 16:21:29 -0500
From:   Rob Herring <robh@...nel.org>
To:     Niklas Cassel <niklas.cassel@...aro.org>
Cc:     Andy Gross <agross@...nel.org>, Ilia Lin <ilia.lin@...nel.org>,
        Viresh Kumar <vireshk@...nel.org>, Nishanth Menon <nm@...com>,
        Stephen Boyd <sboyd@...nel.org>, linux-arm-msm@...r.kernel.org,
        jorge.ramirez-ortiz@...aro.org, bjorn.andersson@...aro.org,
        ulf.hansson@...aro.org, Niklas Cassel <niklas.cassel@...aro.org>,
        Mark Rutland <mark.rutland@....com>, linux-pm@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 06/14] dt-bindings: cpufreq: qcom-nvmem: Support
 pstates provided by a power domain

On Thu, 25 Jul 2019 12:41:34 +0200, Niklas Cassel wrote:
> Some Qualcomm SoCs have support for Core Power Reduction (CPR).
> On these platforms, we need to attach to the power domain provider
> providing the performance states, so that the leaky device (the CPU)
> can configure the performance states (which represent different
> CPU clock frequencies).
> 
> Signed-off-by: Niklas Cassel <niklas.cassel@...aro.org>
> ---
>  .../bindings/opp/qcom-nvmem-cpufreq.txt       | 111 ++++++++++++++++++
>  1 file changed, 111 insertions(+)
> 

Reviewed-by: Rob Herring <robh@...nel.org>

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