linux-kernel - Re: [PATCH v4 21/21] ARM: dts: imx6qdl-colibri.dtsi: UHS-I support for v1.1a hw

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Message-ID: <dd03b626b6d13a10f6e6c644d446c3a51e6b7875.camel@toradex.com>
Date:   Fri, 16 Aug 2019 06:44:56 +0000
From:   Philippe Schenker <philippe.schenker@...adex.com>
To:     "stefan@...er.ch" <stefan@...er.ch>,
        Marcel Ziswiler <marcel.ziswiler@...adex.com>,
        Max Krummenacher <max.krummenacher@...adex.com>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "michal.vokac@...ft.com" <michal.vokac@...ft.com>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>,
        "festevam@...il.com" <festevam@...il.com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>
CC:     "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
        "kernel@...gutronix.de" <kernel@...gutronix.de>,
        Igor Opaniuk <igor.opaniuk@...adex.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-imx@....com" <linux-imx@....com>
Subject: Re: [PATCH v4 21/21] ARM: dts: imx6qdl-colibri.dtsi: UHS-I support
 for v1.1a hw

On Mon, 2019-08-12 at 14:21 +0000, Philippe Schenker wrote:
> From: Igor Opaniuk <igor.opaniuk@...adex.com>
> 
> Provide proper configuration for VGEN3, to make sure it's is always
> powered
> which allows that rail to be automatically switched to 1.8 volts
> for proper UHS-I operation. By default it's disabled.
> 
> With UHS-I enabled:
> [  104.153898] mmc1: new ultra high speed SDR104 SDHC card at address
> 59b4
> [  104.166202] mmcblk1: mmc1:59b4 USD00 15.0 GiB
> [  104.173923]  mmcblk1: p1
> 
> root@...ibri-imx6:~# hdparm -t /dev/mmcblk1
> /dev/mmcblk1:
> Timing buffered disk reads: 226 MB in  3.01 seconds =  75.01 MB/sec
> 
> Signed-off-by: Igor Opaniuk <igor.opaniuk@...adex.com>
> Signed-off-by: Philippe Schenker <philippe.schenker@...adex.com>

Please ignore this patch. There was a misunderstanding and this one
shouldn't go into mainline. Sorry for that!
> 
> ---
> 
> Changes in v4:
> - New patch as of the recommendation from Marcel on ML
> 
> Changes in v3: None
> Changes in v2: None
> 
>  arch/arm/boot/dts/imx6qdl-colibri.dtsi | 43 +++++++++++++++++++++++
> ---
>  1 file changed, 39 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
> b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
> index 9a63debab0b5..0241613b5e2b 100644
> --- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
> @@ -226,7 +226,12 @@
>  				regulator-always-on;
>  			};
>  
> -			/* vgen3: unused */
> +			vgen3_reg: vgen3 {
> +				regulator-min-microvolt = <1800000>;
> +				regulator-max-microvolt = <3300000>;
> +				regulator-boot-on;
> +				regulator-always-on;
> +			};
>  
>  			vgen4_reg: vgen4 {
>  				regulator-min-microvolt = <1800000>;
> @@ -394,13 +399,21 @@
>  
>  /* Colibri MMC */
>  &usdhc1 {
> -	pinctrl-names = "default";
> +	pinctrl-names = "default", "state_100mhz", "state_200mhz";
>  	pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_mmc_cd>;
> +	pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_mmc_cd>;
> +	pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_mmc_cd>;
> +	vqmmc-supply = <&vgen3_reg>;
> +	sd-uhs-sdr12;
> +	sd-uhs-sdr25;
> +	sd-uhs-sdr50;
> +	sd-uhs-sdr104;
> +	label = "MMC1";
>  	cd-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; /* MMCD */
>  	disable-wp;
> -	vqmmc-supply = <&reg_module_3v3>;
> +	enable-sdio-wakeup;
> +	keep-power-in-suspend;
>  	bus-width = <4>;
> -	no-1-8-v;
>  	status = "disabled";
>  };
>  
> @@ -706,6 +719,28 @@
>  		>;
>  	};
>  
> +	pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
> +		fsl,pins = <
> +			MX6QDL_PAD_SD1_CMD__SD1_CMD    0x170b1
> +			MX6QDL_PAD_SD1_CLK__SD1_CLK    0x100b1
> +			MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170b1
> +			MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170b1
> +			MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170b1
> +			MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170b1
> +		>;
> +	};
> +
> +	pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
> +		fsl,pins = <
> +			MX6QDL_PAD_SD1_CMD__SD1_CMD    0x170f1
> +			MX6QDL_PAD_SD1_CLK__SD1_CLK    0x100f1
> +			MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f1
> +			MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f1
> +			MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f1
> +			MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f1
> +		>;
> +	};
> +
>  	pinctrl_usdhc3: usdhc3grp {
>  		fsl,pins = <
>  			MX6QDL_PAD_SD3_CMD__SD3_CMD	0x17059
> -- 
> 2.22.0
>