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Message-ID: <20190822062635.00f6e507@coco.lan>
Date: Thu, 22 Aug 2019 06:26:35 -0300
From: Mauro Carvalho Chehab <mchehab+samsung@...nel.org>
To: Christoph Hellwig <hch@....de>
Cc: Borislav Petkov <bp@...en8.de>, paul.walmsley@...ive.com,
palmer@...ive.com, linux-riscv@...ts.infradead.org,
linux-edac@...r.kernel.org, linux-kernel@...r.kernel.org,
Yash Shah <yash.shah@...ive.com>
Subject: Re: [PATCH] riscv: move sifive_l2_cache.c to drivers/soc
Em Mon, 19 Aug 2019 08:26:19 +0200
Christoph Hellwig <hch@....de> escreveu:
> On Mon, Aug 19, 2019 at 08:09:04AM +0200, Borislav Petkov wrote:
> > On Sun, Aug 18, 2019 at 10:29:35AM +0200, Christoph Hellwig wrote:
> > > The sifive_l2_cache.c is in no way related to RISC-V architecture
> > > memory management. It is a little stub driver working around the fact
> > > that the EDAC maintainers prefer their drivers to be structured in a
> > > certain way
> >
> > That changed recently so I guess we can do the per-IP block driver after
> > all, if people would still prefer it.
>
> That would seem like the best idea. But I don't really know this code
> well enough myself, and I really need to get this code out of the
> forced on RISC-V codebase as some SOCs I'm working with simply don't
> have the memory for it..
>
> So unless someone signs up to do a per-IP block edac drivers instead
> very quickly I'd still like to see something like this go into 5.4
> for now.
I'm wandering if we should at least add an entry for this one at
MAINTAINERS, pointing it to the EDAC mailing list. Something like:
diff --git a/MAINTAINERS b/MAINTAINERS
index 7dfe381c8b43..1c3bc5aa3af0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5906,6 +5906,7 @@ M: Yash Shah <yash.shah@...ive.com>
L: linux-edac@...r.kernel.org
S: Supported
F: drivers/edac/sifive_edac.c
+F: drivers/soc/sifive/
EDAC-SKYLAKE
M: Tony Luck <tony.luck@...el.com>
Thanks,
Mauro
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