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Message-ID: <7cdb9dbb-46e5-b66a-ddf1-c7ecceb28d7a@acm.org>
Date:   Tue, 27 Aug 2019 08:10:42 -0700
From:   Bart Van Assche <bvanassche@....org>
To:     Ming Lei <ming.lei@...hat.com>,
        Thomas Gleixner <tglx@...utronix.de>
Cc:     Jens Axboe <axboe@...com>, Hannes Reinecke <hare@...e.com>,
        Sagi Grimberg <sagi@...mberg.me>, linux-scsi@...r.kernel.org,
        Peter Zijlstra <peterz@...radead.org>,
        Long Li <longli@...rosoft.com>,
        John Garry <john.garry@...wei.com>,
        linux-kernel@...r.kernel.org, linux-nvme@...ts.infradead.org,
        Keith Busch <keith.busch@...el.com>,
        Ingo Molnar <mingo@...hat.com>, Christoph Hellwig <hch@....de>
Subject: Re: [PATCH 3/4] nvme: pci: pass IRQF_RESCURE_THREAD to
 request_threaded_irq

On 8/27/19 1:53 AM, Ming Lei wrote:
> If one vector is spread on several CPUs, usually the interrupt is only
> handled on one of these CPUs.

Is that perhaps a limitation of x86 interrupt handling hardware? See 
also the description of physical and logical destination mode of the 
local APIC in the Intel documentation.

Does that limitation also apply to other platforms than x86?

Thanks,

Bart.

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