linux-kernel - Re: [PATCH 2/2] dt-bindings: imx6q-pcie: add "fsl,pcie-phy-refclk-internal" for i.MX7D

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20190827155626.GA29948@bogus>
Date:   Tue, 27 Aug 2019 10:56:26 -0500
From:   Rob Herring <robh@...nel.org>
To:     André Draszik <git@...red.net>
Cc:     linux-kernel@...r.kernel.org, Richard Zhu <hongxing.zhu@....com>,
        Lucas Stach <l.stach@...gutronix.de>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Mark Rutland <mark.rutland@....com>,
        Shawn Guo <shawnguo@...nel.org>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Pengutronix Kernel Team <kernel@...gutronix.de>,
        Fabio Estevam <festevam@...il.com>,
        NXP Linux Team <linux-imx@....com>,
        linux-pci@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        devicetree@...r.kernel.org
Subject: Re: [PATCH 2/2] dt-bindings: imx6q-pcie: add
 "fsl,pcie-phy-refclk-internal" for i.MX7D

On Tue, Aug 13, 2019 at 11:37:59AM +0100, André Draszik wrote:
> The i.MX7D variant of the IP can use either an external
> crystal oscillator input or an internal clock input as
> a reference clock input for the PCIe PHY.
> 
> Document the optional property 'fsl,pcie-phy-refclk-internal'
> 
> Signed-off-by: André Draszik <git@...red.net>
> Cc: Richard Zhu <hongxing.zhu@....com>
> Cc: Lucas Stach <l.stach@...gutronix.de>
> Cc: Bjorn Helgaas <bhelgaas@...gle.com>
> Cc: Rob Herring <robh+dt@...nel.org>
> Cc: Mark Rutland <mark.rutland@....com>
> Cc: Shawn Guo <shawnguo@...nel.org>
> Cc: Sascha Hauer <s.hauer@...gutronix.de>
> Cc: Pengutronix Kernel Team <kernel@...gutronix.de>
> Cc: Fabio Estevam <festevam@...il.com>
> Cc: NXP Linux Team <linux-imx@....com>
> Cc: linux-pci@...r.kernel.org
> Cc: linux-arm-kernel@...ts.infradead.org
> Cc: devicetree@...r.kernel.org
> Cc: linux-kernel@...r.kernel.org
> ---
>  Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
> index a7f5f5afa0e6..985d7083df9f 100644
> --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
> +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
> @@ -56,6 +56,11 @@ Additional required properties for imx7d-pcie and imx8mq-pcie:
>  	       - "turnoff"
>  - fsl,imx7d-pcie-phy: A phandle to an fsl,imx7d-pcie-phy node.

Not sure how this got in, but why is the phy binding not used here?

>  
> +Additional optional properties for imx7d-pcie:
> +- fsl,pcie-phy-refclk-internal: If present then an internal PLL input is used
> +  as PCIe PHY reference clock source. By default an external ocsillator input
> +  is used.

Can't the clock binding and maybe 'assigned-clocks' be used here? 

Also, this is a property of the PHY, so it belongs in the PHY's node.

Rob