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Date:   Tue, 27 Aug 2019 11:31:59 -0500
From:   Rob Herring <robh@...nel.org>
To:     jassisinghbrar@...il.com
Cc:     dmaengine@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, vkoul@...nel.org, robh+dt@...nel.org,
        Jassi Brar <jaswinder.singh@...aro.org>
Subject: Re: [PATCH 1/2] dt-bindings: milbeaut-m10v-xdmac: Add Socionext
 Milbeaut XDMAC bindings

On Sun, 18 Aug 2019 00:22:24 -0500, jassisinghbrar@...il.com wrote:
> From: Jassi Brar <jaswinder.singh@...aro.org>
> 
> Document the devicetree bindings for Socionext Milbeaut XDMAC
> controller. Controller only supports Mem->Mem transfers. Number
> of physical channels are determined by the number of irqs registered.
> 
> Signed-off-by: Jassi Brar <jaswinder.singh@...aro.org>
> ---
>  .../bindings/dma/milbeaut-m10v-xdmac.txt      | 24 +++++++++++++++++++
>  1 file changed, 24 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/dma/milbeaut-m10v-xdmac.txt
> 

Reviewed-by: Rob Herring <robh@...nel.org>

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