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Message-ID: <20190904060017.GE2672@vkoul-mobl>
Date: Wed, 4 Sep 2019 11:30:17 +0530
From: Vinod Koul <vkoul@...nel.org>
To: jassisinghbrar@...il.com
Cc: dmaengine@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, robh+dt@...nel.org,
Jassi Brar <jaswinder.singh@...aro.org>
Subject: Re: [PATCH 1/2] dt-bindings: milbeaut-m10v-xdmac: Add Socionext
Milbeaut XDMAC bindings
On 18-08-19, 00:22, jassisinghbrar@...il.com wrote:
> From: Jassi Brar <jaswinder.singh@...aro.org>
>
> Document the devicetree bindings for Socionext Milbeaut XDMAC
> controller. Controller only supports Mem->Mem transfers. Number
> of physical channels are determined by the number of irqs registered.
>
> Signed-off-by: Jassi Brar <jaswinder.singh@...aro.org>
> ---
> .../bindings/dma/milbeaut-m10v-xdmac.txt | 24 +++++++++++++++++++
> 1 file changed, 24 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/dma/milbeaut-m10v-xdmac.txt
>
> diff --git a/Documentation/devicetree/bindings/dma/milbeaut-m10v-xdmac.txt b/Documentation/devicetree/bindings/dma/milbeaut-m10v-xdmac.txt
> new file mode 100644
> index 000000000000..1f15512e3f19
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/milbeaut-m10v-xdmac.txt
> @@ -0,0 +1,24 @@
> +* Milbeaut AXI DMA Controller
> +
> +Milbeaut AXI DMA controller has only memory to memory transfer capability.
> +
> +* DMA controller
> +
> +Required property:
> +- compatible: Should be "socionext,milbeaut-m10v-xdmac"
> +- reg: Should contain DMA registers location and length.
> +- interrupts: Should contain all of the per-channel DMA interrupts.
> + Number of channels is configurable - 2, 4 or 8, so
> + the number of interrupts specfied should be {2,4,8}.
s/specfied/specified
--
~Vinod
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