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Message-ID: <20190828162857.GO2332@hirez.programming.kicks-ass.net>
Date: Wed, 28 Aug 2019 18:28:57 +0200
From: Peter Zijlstra <peterz@...radead.org>
To: Andi Kleen <ak@...ux.intel.com>
Cc: kan.liang@...ux.intel.com, acme@...nel.org, mingo@...hat.com,
linux-kernel@...r.kernel.org, tglx@...utronix.de, jolsa@...nel.org,
eranian@...gle.com, alexander.shishkin@...ux.intel.com
Subject: Re: [RESEND PATCH V3 3/8] perf/x86/intel: Support hardware TopDown
metrics
On Wed, Aug 28, 2019 at 09:17:54AM -0700, Andi Kleen wrote:
> > This really doesn't make sense to me; if you set FIXED_CTR3 := 0, you'll
> > never trigger the overflow there; this then seems to suggest the actual
>
> The 48bit counter might overflow in a few hours.
Sure; the point is? Kan said it should not be too big; a full 48bit wrap
around must be too big or nothing is.
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