linux-kernel - [PATCH] arm64: dts: imx8mq: Add CAAM node

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Date:   Fri, 30 Aug 2019 14:01:39 -0700
From:   Andrey Smirnov <andrew.smirnov@...il.com>
To:     Herbert Xu <herbert@...dor.apana.org.au>,
        Shawn Guo <shawnguo@...nel.org>
Cc:     Andrey Smirnov <andrew.smirnov@...il.com>,
        Horia Geantă <horia.geanta@....com>,
        Cory Tusar <cory.tusar@....aero>,
        Chris Healy <cphealy@...il.com>,
        Lucas Stach <l.stach@...gutronix.de>,
        Iuliana Prodan <iuliana.prodan@....com>,
        linux-crypto@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCH] arm64: dts: imx8mq: Add CAAM node

Add node for CAAM - Cryptographic Acceleration and Assurance Module.

Signed-off-by: Horia Geantă <horia.geanta@....com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@...il.com>
Cc: Cory Tusar <cory.tusar@....aero>
Cc: Chris Healy <cphealy@...il.com>
Cc: Lucas Stach <l.stach@...gutronix.de>
Cc: Herbert Xu <herbert@...dor.apana.org.au>
Cc: Shawn Guo <shawnguo@...nel.org>
Cc: Iuliana Prodan <iuliana.prodan@....com>
Cc: linux-crypto@...r.kernel.org
Cc: linux-kernel@...r.kernel.org
---

Shawn:

Just a bit of a context: as per this thread
https://lore.kernel.org/linux-crypto/20190830131547.GA27480@gondor.apana.org.au/
I am hoping I can get and Ack from you for this patch, so it can go
via cryptodev tree.

Thanks,
Andrey Smirnov

 arch/arm64/boot/dts/freescale/imx8mq.dtsi | 30 +++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index d09b808eff87..752d5a61878c 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -728,6 +728,36 @@
 				status = "disabled";
 			};
 
+			crypto: crypto@...00000 {
+				compatible = "fsl,sec-v4.0";
+				#address-cells = <1>;
+				#size-cells = <1>;
+				reg = <0x30900000 0x40000>;
+				ranges = <0 0x30900000 0x40000>;
+				interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clk IMX8MQ_CLK_AHB>,
+					 <&clk IMX8MQ_CLK_IPG_ROOT>;
+				clock-names = "aclk", "ipg";
+
+				sec_jr0: jr@...0 {
+					compatible = "fsl,sec-v4.0-job-ring";
+					reg = <0x1000 0x1000>;
+					interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+				};
+
+				sec_jr1: jr@...0 {
+					compatible = "fsl,sec-v4.0-job-ring";
+					reg = <0x2000 0x1000>;
+					interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+				};
+
+				sec_jr2: jr@...0 {
+					compatible = "fsl,sec-v4.0-job-ring";
+					reg = <0x3000 0x1000>;
+					interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
+				};
+			};
+
 			i2c1: i2c@...20000 {
 				compatible = "fsl,imx8mq-i2c", "fsl,imx21-i2c";
 				reg = <0x30a20000 0x10000>;
-- 
2.21.0