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Message-ID: <c142c351-5559-b162-e68f-98cf86b039aa@katsuster.net>
Date: Wed, 4 Sep 2019 01:03:18 +0900
From: Katsuhiro Suzuki <katsuhiro@...suster.net>
To: Mark Brown <broonie@...nel.org>
Cc: David Yang <yangxiaohua@...rest-semi.com>,
Daniel Drake <drake@...lessm.com>,
Hans de Goede <hdegoede@...hat.com>,
alsa-devel@...a-project.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/3] ASoC: es8316: judge PCM rate at later timing
Hello Mark,
On 2019/09/03 20:11, Mark Brown wrote:
> On Tue, Sep 03, 2019 at 04:19:10AM +0900, Katsuhiro Suzuki wrote:
>> On 2019/09/02 21:02, Mark Brown wrote:
>
>>> The best way to handle this is to try to support both fixed and variable
>>> clock rates, some other drivers do this by setting constraints based on
>>> MCLK only if the MCLK has been set to a non-zero value. They have the
>>> machine drivers reset the clock rate to 0 when it goes idle so that no
>>> constraints are applied then. This means that if the machine has a
>
>> In my understanding, fixed and variable clock both use set_sysclk() for
>> telling their MCLK to codec driver. For fixed MCLK cases we need to
>> apply constraint but for variable MCLK cases we should not set
>> constraints at set_sysclk(). How can we identify these two cases...?
>
> Like I say it's usually done by settingthe MCLK to 0 when not in use and
> then not applying any constraints if there's no MCLK set.
>
Ah... I understand. Current implementation refuses MCLK == 0.
I'll change to accept MCLK == 0 for fixed clock users and send v3 patch.
Best Regards,
Katsuhiro Suzuki
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