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Message-ID: <201909161958.U9H97q1E%lkp@intel.com>
Date: Mon, 16 Sep 2019 19:31:33 +0800
From: kbuild test robot <lkp@...el.com>
To: Brian Masney <masneyb@...tation.org>
Cc: kbuild-all@...org, linus.walleij@...aro.org, agross@...nel.org,
bjorn.andersson@...aro.org, linux-arm-msm@...r.kernel.org,
linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] qcom: ssbi-gpio: convert to hierarchical IRQ helpers in
gpio core
Hi Brian,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on linus/master]
[cannot apply to v5.3 next-20190915]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Brian-Masney/qcom-ssbi-gpio-convert-to-hierarchical-IRQ-helpers-in-gpio-core/20190916-134112
config: arm-allmodconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 7.4.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=7.4.0 make.cross ARCH=arm
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@...el.com>
All errors (new ones prefixed by >>):
drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c: In function 'pm8xxx_gpio_probe':
>> drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c:794:6: error: 'struct gpio_irq_chip' has no member named 'fwnode'
girq->fwnode = of_node_to_fwnode(pctrl->dev->of_node);
^~
>> drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c:795:8: error: 'struct gpio_irq_chip' has no member named 'parent_domain'; did you mean 'parent_handler'?
girq->parent_domain = parent_domain;
^~~~~~~~~~~~~
parent_handler
>> drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c:796:6: error: 'struct gpio_irq_chip' has no member named 'child_to_parent_hwirq'
girq->child_to_parent_hwirq = pm8xxx_child_to_parent_hwirq;
^~
>> drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c:797:6: error: 'struct gpio_irq_chip' has no member named 'populate_parent_fwspec'
girq->populate_parent_fwspec = gpiochip_populate_parent_fwspec_fourcell;
^~
>> drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c:797:33: error: 'gpiochip_populate_parent_fwspec_fourcell' undeclared (first use in this function); did you mean 'gpiochip_line_is_open_source'?
girq->populate_parent_fwspec = gpiochip_populate_parent_fwspec_fourcell;
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
gpiochip_line_is_open_source
drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c:797:33: note: each undeclared identifier is reported only once for each function it appears in
>> drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c:798:6: error: 'struct gpio_irq_chip' has no member named 'child_offset_to_irq'
girq->child_offset_to_irq = pm8xxx_child_offset_to_irq;
^~
>> drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c:799:8: error: 'struct gpio_irq_chip' has no member named 'child_irq_domain_ops'; did you mean 'domain_ops'?
girq->child_irq_domain_ops.translate = pm8xxx_domain_translate;
^~~~~~~~~~~~~~~~~~~~
domain_ops
vim +794 drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
766
767 pctrl->pctrl = devm_pinctrl_register(&pdev->dev, &pctrl->desc, pctrl);
768 if (IS_ERR(pctrl->pctrl)) {
769 dev_err(&pdev->dev, "couldn't register pm8xxx gpio driver\n");
770 return PTR_ERR(pctrl->pctrl);
771 }
772
773 pctrl->chip = pm8xxx_gpio_template;
774 pctrl->chip.base = -1;
775 pctrl->chip.parent = &pdev->dev;
776 pctrl->chip.of_node = pdev->dev.of_node;
777 pctrl->chip.of_gpio_n_cells = 2;
778 pctrl->chip.label = dev_name(pctrl->dev);
779 pctrl->chip.ngpio = pctrl->npins;
780
781 parent_node = of_irq_find_parent(pctrl->dev->of_node);
782 if (!parent_node)
783 return -ENXIO;
784
785 parent_domain = irq_find_host(parent_node);
786 of_node_put(parent_node);
787 if (!parent_domain)
788 return -ENXIO;
789
790 girq = &pctrl->chip.irq;
791 girq->chip = &pm8xxx_irq_chip;
792 girq->default_type = IRQ_TYPE_NONE;
793 girq->handler = handle_level_irq;
> 794 girq->fwnode = of_node_to_fwnode(pctrl->dev->of_node);
> 795 girq->parent_domain = parent_domain;
> 796 girq->child_to_parent_hwirq = pm8xxx_child_to_parent_hwirq;
> 797 girq->populate_parent_fwspec = gpiochip_populate_parent_fwspec_fourcell;
> 798 girq->child_offset_to_irq = pm8xxx_child_offset_to_irq;
> 799 girq->child_irq_domain_ops.translate = pm8xxx_domain_translate;
800
801 ret = gpiochip_add_data(&pctrl->chip, pctrl);
802 if (ret) {
803 dev_err(&pdev->dev, "failed register gpiochip\n");
804 return ret;
805 }
806
807 /*
808 * For DeviceTree-supported systems, the gpio core checks the
809 * pinctrl's device node for the "gpio-ranges" property.
810 * If it is present, it takes care of adding the pin ranges
811 * for the driver. In this case the driver can skip ahead.
812 *
813 * In order to remain compatible with older, existing DeviceTree
814 * files which don't set the "gpio-ranges" property or systems that
815 * utilize ACPI the driver has to call gpiochip_add_pin_range().
816 */
817 if (!of_property_read_bool(pctrl->dev->of_node, "gpio-ranges")) {
818 ret = gpiochip_add_pin_range(&pctrl->chip, dev_name(pctrl->dev),
819 0, 0, pctrl->chip.ngpio);
820 if (ret) {
821 dev_err(pctrl->dev, "failed to add pin range\n");
822 goto unregister_gpiochip;
823 }
824 }
825
826 platform_set_drvdata(pdev, pctrl);
827
828 dev_dbg(&pdev->dev, "Qualcomm pm8xxx gpio driver probed\n");
829
830 return 0;
831
832 unregister_gpiochip:
833 gpiochip_remove(&pctrl->chip);
834
835 return ret;
836 }
837
---
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