linux-kernel - Re: [PATCH v1 2/2] spi: cadence-qspi: Add QSPI support for Intel LGM SoC

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Date:   Thu, 19 Sep 2019 13:45:02 +0800
From:   "Ramuthevar, Vadivel MuruganX" 
        <vadivel.muruganx.ramuthevar@...ux.intel.com>
To:     Mark Brown <broonie@...nel.org>
Cc:     robh+dt@...nel.org, mark.rutland@....com,
        linux-spi@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, cheol.yong.kim@...el.com,
        qi-ming.wu@...el.com
Subject: Re: [PATCH v1 2/2] spi: cadence-qspi: Add QSPI support for Intel LGM
 SoC

Hi Mark,

    Thank you for the comments and queries.

On 18/9/2019 8:08 PM, Mark Brown wrote:
> On Wed, Sep 18, 2019 at 01:59:06PM +0800, Ramuthevar, Vadivel MuruganX wrote:
>> On 17/9/2019 11:36 PM, Mark Brown wrote:
>>> On Tue, Sep 17, 2019 at 10:11:28AM +0800, Ramuthevar, Vadivel MuruganX wrote:
>>>> *    spi-cadence.c* in *drivers/spi/*, which supports very old legacy
>>>> cadence-spi based devices(normal)
>>>> *    cadence-quadspi.c(drivers/mtd/spi-nor/)* : specific support to SPI-NOR
>>>> flash with new spi-nor layer.
>>>>       all the API's in this driver purely on spi-nor specific, so couldn't
>>>> proceed to adapt.
>>> Are these completely separate IPs or are they just different versions of
>>> the same IP?
>> These are same IPs , but different features Enabled/Disabled depends upon
>> the SoC vendors.
>> for e.g: Intel LGM SoC uses the same IP, but without DMA and Direct access
>> controller.
>> also dedicated support to flash devices.
> If it's different versions of the same IP then everything should be in
> one driver with the optional features enabled depending on what's in a
> given system.
Agreed!, I am trying to adapt the driver/mtd/spi-nor/cadence-quadspi.c 
and newly sent patches
in a single driver file, also trying to use spi_mem_ops framework.

With Best Regards
Vadivel