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Message-ID: <20190918120846.GH2596@sirena.co.uk>
Date:   Wed, 18 Sep 2019 13:08:48 +0100
From:   Mark Brown <broonie@...nel.org>
To:     "Ramuthevar, Vadivel MuruganX" 
        <vadivel.muruganx.ramuthevar@...ux.intel.com>
Cc:     robh+dt@...nel.org, mark.rutland@....com,
        linux-spi@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, cheol.yong.kim@...el.com,
        qi-ming.wu@...el.com
Subject: Re: [PATCH v1 2/2] spi: cadence-qspi: Add QSPI support for Intel LGM
 SoC

On Wed, Sep 18, 2019 at 01:59:06PM +0800, Ramuthevar, Vadivel MuruganX wrote:
> On 17/9/2019 11:36 PM, Mark Brown wrote:
> > On Tue, Sep 17, 2019 at 10:11:28AM +0800, Ramuthevar, Vadivel MuruganX wrote:

> > > *    spi-cadence.c* in *drivers/spi/*, which supports very old legacy
> > > cadence-spi based devices(normal)
> > > *    cadence-quadspi.c(drivers/mtd/spi-nor/)* : specific support to SPI-NOR
> > > flash with new spi-nor layer.
> > >      all the API's in this driver purely on spi-nor specific, so couldn't
> > > proceed to adapt.

> > Are these completely separate IPs or are they just different versions of
> > the same IP?

> These are same IPs , but different features Enabled/Disabled depends upon
> the SoC vendors.

> for e.g: Intel LGM SoC uses the same IP, but without DMA and Direct access
> controller.

> also dedicated support to flash devices.

If it's different versions of the same IP then everything should be in
one driver with the optional features enabled depending on what's in a
given system.

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