[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <1568895064-4116-4-git-send-email-jianxin.pan@amlogic.com>
Date: Thu, 19 Sep 2019 08:11:04 -0400
From: Jianxin Pan <jianxin.pan@...ogic.com>
To: Kevin Hilman <khilman@...libre.com>,
<linux-amlogic@...ts.infradead.org>
CC: Jianxin Pan <jianxin.pan@...ogic.com>,
Zhiqiang Liang <zhiqiang.liang@...ogic.com>,
Rob Herring <robh+dt@...nel.org>,
Neil Armstrong <narmstrong@...libre.com>,
Jerome Brunet <jbrunet@...libre.com>,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
<linux-pm@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<devicetree@...r.kernel.org>, Jian Hu <jian.hu@...ogic.com>,
Hanjie Lin <hanjie.lin@...ogic.com>,
Victor Wan <victor.wan@...ogic.com>,
Xingyu Chen <xingyu.chen@...ogic.com>
Subject: [PATCH 3/3] arm64: dts: meson: a1: add secure power domain controller
Enable power domain controller for Meson A1 SoC.
Signed-off-by: Jianxin Pan <jianxin.pan@...ogic.com>
Signed-off-by: Zhiqiang Liang <zhiqiang.liang@...ogic.com>
---
arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
index 7210ad0..d689e5c 100644
--- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
@@ -93,6 +93,12 @@
clock-names = "xtal", "pclk", "baud";
status = "disabled";
};
+
+ pwrc: power-controller {
+ compatible = "amlogic,meson-a1-pwrc";
+ #power-domain-cells = <1>;
+ status = "okay";
+ };
};
gic: interrupt-controller@...01000 {
--
2.7.4
Powered by blists - more mailing lists