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Message-ID: <CAOMZO5AOVfBpz2Azh65iT_W3CBZUxf9KnqA=kdow7XWd4j--Qg@mail.gmail.com>
Date: Mon, 23 Sep 2019 13:12:42 -0300
From: Fabio Estevam <festevam@...il.com>
To: Laurentiu Palcu <laurentiu.palcu@....com>
Cc: Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
NXP Linux Team <linux-imx@....com>,
Guido Günther <agx@...xcpu.org>,
Lucas Stach <l.stach@...gutronix.de>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE"
<linux-arm-kernel@...ts.infradead.org>,
linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 5/5] arm64: dts: imx8mq: add DCSS node
Hi Laurentiu,
On Mon, Sep 23, 2019 at 11:14 AM Laurentiu Palcu
<laurentiu.palcu@....com> wrote:
> +
> + dcss: dcss@...2e00000 {
Node names should be generic, so:
dcss: display-controller@...00000
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "nxp,imx8mq-dcss";
> + reg = <0x32e00000 0x2D000>, <0x32e2f000 0x1000>;
0x2d000 for consistency.
> + interrupts = <6>, <8>, <9>;
The interrupts are passed in the <GIC_SPI xxx IRQ_TYPE_LEVEL_HIGH> format.
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