linux-kernel - Re: [PATCH] PCI: mobiveil: Fix csr

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Date:   Thu, 26 Sep 2019 10:29:34 +0100
From:   Andrew Murray <andrew.murray@....com>
To:     Kefeng Wang <wangkefeng.wang@...wei.com>
Cc:     linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
        Hou Zhiqiang <Zhiqiang.Hou@....com>,
        Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        Minghuan Lian <Minghuan.Lian@....com>,
        Subrahmanya Lingappa <l.subrahmanya@...iveil.co.in>,
        Karthikeyan Mitran <m.karthikeyan@...iveil.co.in>
Subject: Re: [PATCH] PCI: mobiveil: Fix csr_read/write build issue

On Wed, Sep 25, 2019 at 10:21:21PM +0800, Kefeng Wang wrote:
> The riscv has csr_read/write macro, see arch/riscv/include/asm/csr.h,
> the same function naming will cause build error, rename them to
> __csr_read/write to fix it.
> 
> drivers/pci/controller/pcie-mobiveil.c:238:69: error: macro "csr_read" passed 3 arguments, but takes just 1
>  static u32 csr_read(struct mobiveil_pcie *pcie, u32 off, size_t size)
> 
> drivers/pci/controller/pcie-mobiveil.c:253:80: error: macro "csr_write" passed 4 arguments, but takes just 2
>  static void csr_write(struct mobiveil_pcie *pcie, u32 val, u32 off, size_t size)
> 
> Cc: Hou Zhiqiang <Zhiqiang.Hou@....com>
> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@....com>
> Cc: Minghuan Lian <Minghuan.Lian@....com>
> Cc: Subrahmanya Lingappa <l.subrahmanya@...iveil.co.in>
> Cc: Karthikeyan Mitran <m.karthikeyan@...iveil.co.in>
> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@....com>
> Fixes: bcbe0d9a8d93 ("PCI: mobiveil: Unify register accessors")
> Signed-off-by: Kefeng Wang <wangkefeng.wang@...wei.com>
> ---
>  drivers/pci/controller/pcie-mobiveil.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c
> index a45a6447b01d..7ba1138c3667 100644
> --- a/drivers/pci/controller/pcie-mobiveil.c
> +++ b/drivers/pci/controller/pcie-mobiveil.c
> @@ -235,7 +235,7 @@ static int mobiveil_pcie_write(void __iomem *addr, int size, u32 val)
>  	return PCIBIOS_SUCCESSFUL;
>  }
>  
> -static u32 csr_read(struct mobiveil_pcie *pcie, u32 off, size_t size)
> +static u32 __csr_read(struct mobiveil_pcie *pcie, u32 off, size_t size)
>  {
>  	void *addr;
>  	u32 val;
> @@ -250,7 +250,7 @@ static u32 csr_read(struct mobiveil_pcie *pcie, u32 off, size_t size)
>  	return val;
>  }
>  
> -static void csr_write(struct mobiveil_pcie *pcie, u32 val, u32 off, size_t size)
> +static void __csr_write(struct mobiveil_pcie *pcie, u32 val, u32 off, size_t size)
>  {
>  	void *addr;
>  	int ret;
> @@ -264,12 +264,12 @@ static void csr_write(struct mobiveil_pcie *pcie, u32 val, u32 off, size_t size)
>  
>  static u32 csr_readl(struct mobiveil_pcie *pcie, u32 off)
>  {
> -	return csr_read(pcie, off, 0x4);
> +	return __csr_read(pcie, off, 0x4);
>  }
>  
>  static void csr_writel(struct mobiveil_pcie *pcie, u32 val, u32 off)
>  {
> -	csr_write(pcie, val, off, 0x4);
> +	__csr_write(pcie, val, off, 0x4);
>  }

Reviewed-by: Andrew Murray <andrew.murray@....com>

Though I'd be just as happy if the csr_[read,write][l,] functions were renamed
to mobiveil_csr_[read,write][l,].

>  
>  static bool mobiveil_pcie_link_up(struct mobiveil_pcie *pcie)
> -- 
> 2.20.1
>