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Message-ID: <BL0PR11MB31709BA9A5F4E4F5455D913CF2820@BL0PR11MB3170.namprd11.prod.outlook.com>
Date: Mon, 30 Sep 2019 18:23:50 +0000
From: "Kammela, Gayatri" <gayatri.kammela@...el.com>
To: Andy Shevchenko <andy.shevchenko@...il.com>
CC: Platform Driver <platform-driver-x86@...r.kernel.org>,
"Somayaji, Vishwanath" <vishwanath.somayaji@...el.com>,
Darren Hart <dvhart@...radead.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
"Prestopine, Charles D" <charles.d.prestopine@...el.com>,
Peter Zijlstra <peterz@...radead.org>,
"Pandruvada, Srinivas" <srinivas.pandruvada@...el.com>,
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
"Liang, Kan" <kan.liang@...el.com>,
"Box, David E" <david.e.box@...el.com>,
"Bhardwaj, Rajneesh" <rajneesh.bhardwaj@...el.com>,
"Luck, Tony" <tony.luck@...el.com>
Subject: RE: [PATCH v1 0/5] Add Tiger Lake/Elkhart Lake support to pmc_core
driver
> On Thu, Sep 26, 2019 at 9:43 PM Gayatri Kammela
> <gayatri.kammela@...el.com> wrote:
>
> Thank you for the series, I'll comment them later.
Thank you Andy!
>
> For now, check how to properly setup prefix for all patches. The Title all
> broken.
I'm sorry about that. I will fix it in v2
>
> > Patch 1: Cleans up termination lines
> > Patch 2: Refactor driver for ease of adding new SoCs Patch 3: Refactor
> > debugfs entry for PCH IPs power gating status Patch 4: Add Tiger Lake
> > legacy support to pmc_core Patch 5: Add Elkhart Lake legacy support to
> > pmc_core
> >
> > All the information regarding the PCH IPs and names of IPs will be
> > available in *future* Intel's Platform Controller Hub (PCH) External
> > Design Specification
> > (EDS) document.
>
> When?
I was told it will be available in the upcoming release of EDS document. I am not aware of the timeline. I will update the timeline in v2.
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