lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20191011153225.GL27757@arm.com>
Date:   Fri, 11 Oct 2019 16:32:26 +0100
From:   Dave Martin <Dave.Martin@....com>
To:     Richard Henderson <richard.henderson@...aro.org>
Cc:     Mark Rutland <mark.rutland@....com>,
        Paul Elliott <paul.elliott@....com>,
        Peter Zijlstra <peterz@...radead.org>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will.deacon@....com>,
        Yu-cheng Yu <yu-cheng.yu@...el.com>,
        Amit Kachhap <amit.kachhap@....com>,
        Vincenzo Frascino <vincenzo.frascino@....com>,
        linux-arch@...r.kernel.org, Eugene Syromiatnikov <esyr@...hat.com>,
        Szabolcs Nagy <szabolcs.nagy@....com>,
        "H.J. Lu" <hjl.tools@...il.com>, Andrew Jones <drjones@...hat.com>,
        Kees Cook <keescook@...omium.org>,
        Arnd Bergmann <arnd@...db.de>, Jann Horn <jannh@...gle.com>,
        Kristina Martšenko <kristina.martsenko@....com>,
        Mark Brown <broonie@...nel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        linux-arm-kernel@...ts.infradead.org,
        Florian Weimer <fweimer@...hat.com>,
        linux-kernel@...r.kernel.org, Sudakshina Das <sudi.das@....com>
Subject: Re: [PATCH v2 05/12] arm64: Basic Branch Target Identification
 support

On Fri, Oct 11, 2019 at 11:25:33AM -0400, Richard Henderson wrote:
> On 10/11/19 11:10 AM, Mark Rutland wrote:
> > On Thu, Oct 10, 2019 at 07:44:33PM +0100, Dave Martin wrote:
> >> @@ -730,6 +730,11 @@ static void setup_return
> >>  	regs->regs[29] = (unsigned long)&user->next_frame->fp;
> >>  	regs->pc = (unsigned long)ka->sa.sa_handler;
> >>  
> >> +	if (system_supports_bti()) {
> >> +		regs->pstate &= ~PSR_BTYPE_MASK;
> >> +		regs->pstate |= PSR_BTYPE_CALL;
> >> +	}
> >> +
> > 
> > I think we might need a comment as to what we're trying to ensure here.
> > 
> > I was under the (perhaps mistaken) impression that we'd generate a
> > pristine pstate for a signal handler, and it's not clear to me that we
> > must ensure the first instruction is a target instruction.
> 
> I think it makes sense to treat entry into a signal handler as a call.  Code
> that has been compiled for BTI, and whose page has been marked with PROT_BTI,
> will already have the pauth/bti markup at the beginning of the signal handler
> function; we might as well verify that.
> 
> Otherwise sigaction becomes a hole by which an attacker can force execution to
> start at any arbitrary address.

Ack, that's the intended rationale -- I also outlined this in the commit
message.

Does this sound reasonable?


Either way, I feel we should do this: any function in a PROT_BTI page
should have a suitable landing pad.  There's no reason I can see why
a protection given to any other callback function should be omitted
for a signal handler.

Note, if the signal handler isn't in a PROT_BTI page then overriding
BTYPE here will not trigger a Branch Target exception.

I'm happy to drop a brief comment into the code also, once we're
agreed on what the code should be doing.

Cheers
---Dave

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ