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Message-ID: <ba7cf838-dc20-2007-cbf4-e8fbcd49e69f@ti.com>
Date: Tue, 15 Oct 2019 16:53:20 +0530
From: Kishon Vijay Abraham I <kishon@...com>
To: Tom Joseph <tjoseph@...ence.com>, <linux-pci@...r.kernel.org>
CC: Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] PCI:cadence:Driver refactored to use as a core library.
Hi Tom,
On 01/10/19 4:45 PM, Kishon Vijay Abraham I wrote:
> Hi Tom,
>
> On 30/09/19 10:12 PM, Tom Joseph wrote:
>> All the platform related APIs/Structures in the driver has been extracted
>> out to a separate file (pcie-cadence-plat.c). This will enable the
>> driver to be used as a core library, which could be used by other
>> platform drivers.Testing was done using simulation environment.
>>
>> Signed-off-by: Tom Joseph <tjoseph@...ence.com>
>> ---
>> drivers/pci/controller/Kconfig | 35 +++++++
>> drivers/pci/controller/Makefile | 1 +
>> drivers/pci/controller/pcie-cadence-ep.c | 78 ++-------------
>> drivers/pci/controller/pcie-cadence-host.c | 77 +++------------
>> drivers/pci/controller/pcie-cadence-plat.c | 154 +++++++++++++++++++++++++++++
>> drivers/pci/controller/pcie-cadence.h | 69 +++++++++++++
>> 6 files changed, 278 insertions(+), 136 deletions(-)
>> create mode 100644 drivers/pci/controller/pcie-cadence-plat.c
>>
<snip>
>> diff --git a/drivers/pci/controller/pcie-cadence-plat.c b/drivers/pci/controller/pcie-cadence-plat.c
>> new file mode 100644
>> index 0000000..274615d
>> --- /dev/null
>> +++ b/drivers/pci/controller/pcie-cadence-plat.c
>> @@ -0,0 +1,154 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +// Copyright (c) 2019 Cadence
>> +// Cadence PCIe platform driver.
>> +// Author: Tom Joseph <tjoseph@...ence.com>
>> +
>> +#include <linux/kernel.h>
>> +#include <linux/of_address.h>
>> +#include <linux/of_pci.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/pm_runtime.h>
>> +#include <linux/of_device.h>
>> +#include "pcie-cadence.h"
>> +
>> +/**
>> + * struct cdns_plat_pcie - private data for this PCIe platform driver
>> + * @pcie: Cadence PCIe controller
>> + * @regmap: pointer to PCIe device
>> + * @is_rc: Set to 1 indicates the PCIe controller mode is Root Complex,
>> + * if 0 it is in Endpoint mode.
>> + */
>> +struct cdns_plat_pcie {
>> + struct cdns_pcie *pcie;
>> + bool is_rc;
>> +};
>> +
>> +struct cdns_plat_pcie_of_data {
>> + bool is_rc;
>> +};
>> +
>> +static const struct of_device_id cdns_plat_pcie_of_match[];
>> +
>> +int cdns_plat_pcie_link_control(struct cdns_pcie *pcie, bool start)
>> +{
>> + pr_debug(" %s called\n", __func__);
>> + return 0;
>> +}
>> +
>> +bool cdns_plat_pcie_link_status(struct cdns_pcie *pcie)
How do you get cdns_plat_pcie from pcie? Cadence plat doesn't need it however
the platform specific base address will be stored in the platform specific
structure (struct cdns_plat_pcie here) which will be used for performing
controller configuration.
I think you can just move *dev to struct cdns_pcie from struct
cdns_pcie_ep/struct cdns_pcie_rc and use dev_get_drvdata here to get platform
specific structure.
Thanks
Kishon
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