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Message-ID: <20191015173035.GN13874@arrakis.emea.arm.com>
Date: Tue, 15 Oct 2019 18:30:36 +0100
From: Catalin Marinas <catalin.marinas@....com>
To: Marc Zyngier <maz@...nel.org>
Cc: Will Deacon <will@...nel.org>,
Suzuki K Poulose <suzuki.poulose@....com>,
James Morse <james.morse@....com>,
Julien Thierry <julien.thierry.kdev@...il.com>,
huawei.libin@...wei.com, uohanjun@...wei.com, liwei391@...wei.com,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 0/2] arm64: Relax ICC_PMR_EL1 synchronisation when
possible
On Wed, Oct 02, 2019 at 10:06:11AM +0100, Marc Zyngier wrote:
> This is a very late update on [1], fixing the 32bit compilation issue that
> was present in v2, and adding an extra message in the kernel log to find out
> what is going on.
>
> [1] http://lore.kernel.org/r/20190802125208.73162-1-maz@kernel.org
>
> Marc Zyngier (2):
> arm64: Relax ICC_PMR_EL1 accesses when ICC_CTLR_EL1.PMHE is clear
> arm64: Document ICC_CTLR_EL3.PMHE setting requirements
Queued for 5.5. Thanks.
--
Catalin
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