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Message-Id: <20191021065522.24511-8-rnayak@codeaurora.org>
Date: Mon, 21 Oct 2019 12:25:16 +0530
From: Rajendra Nayak <rnayak@...eaurora.org>
To: agross@...nel.org, robh+dt@...nel.org, bjorn.andersson@...aro.org
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, Kiran Gunda <kgunda@...eaurora.org>,
Rajendra Nayak <rnayak@...eaurora.org>
Subject: [PATCH v2 07/13] arm64: dts: qcom: sc7180: Add SPMI PMIC arbiter device
From: Kiran Gunda <kgunda@...eaurora.org>
Add SPMI PMIC arbiter device to communicate with PMICs
attached to SPMI bus.
Signed-off-by: Kiran Gunda <kgunda@...eaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@...eaurora.org>
---
v2: No change
arch/arm64/boot/dts/qcom/sc7180.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 6b3f08133eff..51b8004aa6a7 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -224,6 +224,25 @@
};
};
+ spmi_bus: spmi@...0000 {
+ compatible = "qcom,spmi-pmic-arb";
+ reg = <0 0xc440000 0 0x1100>,
+ <0 0xc600000 0 0x2000000>,
+ <0 0xe600000 0 0x100000>,
+ <0 0xe700000 0 0xa0000>,
+ <0 0xc40a000 0 0x26000>;
+ reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
+ interrupt-names = "periph_irq";
+ interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
+ qcom,ee = <0>;
+ qcom,channel = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-controller;
+ #interrupt-cells = <4>;
+ cell-index = <0>;
+ };
+
apps_smmu: iommu@...00000 {
compatible = "qcom,sc7180-smmu-500", "arm,mmu-500";
reg = <0 0x15000000 0 0x100000>;
--
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