linux-kernel - [PATCH 1/2] dt-bindings: PCI: designware: Add binding for ZRX-DC PHY property

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Message-Id: <1571660755-30270-1-git-send-email-anvesh.s@samsung.com>
Date:   Mon, 21 Oct 2019 17:55:55 +0530
From:   Anvesh Salveru <anvesh.s@...sung.com>
To:     linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Cc:     bhelgaas@...gle.com, gustavo.pimentel@...opsys.com,
        jingoohan1@...il.com, robh+dt@...nel.org, mark.rutland@....com,
        Anvesh Salveru <anvesh.s@...sung.com>,
        Pankaj Dubey <pankaj.dubey@...sung.com>
Subject: [PATCH 1/2] dt-bindings: PCI: designware: Add binding for ZRX-DC
 PHY property

Add support for ZRX-DC compliant PHYs. If PHY is not compliant to ZRX-DC
specification, then after every 100ms link should transition to recovery
state during the low power states which increases power consumption.

Platforms with ZRX-DC compliant PHY can use "snps,phy-zrxdc-compliant"
property in DesignWare controller DT node.

Signed-off-by: Anvesh Salveru <anvesh.s@...sung.com>
Signed-off-by: Pankaj Dubey <pankaj.dubey@...sung.com>
---
 Documentation/devicetree/bindings/pci/designware-pcie.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt
index 78494c4050f7..9507ac38ac89 100644
--- a/Documentation/devicetree/bindings/pci/designware-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt
@@ -38,6 +38,8 @@ Optional properties:
    for data corruption. CDM registers include standard PCIe configuration
    space registers, Port Logic registers, DMA and iATU (internal Address
    Translation Unit) registers.
+- snps,phy-zrxdc-compliant: This property is needed if phy complies with the
+  ZRX-DC specification.
 RC mode:
 - num-viewport: number of view ports configured in hardware. If a platform
   does not specify it, the driver assumes 2.
-- 
2.17.1