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Message-ID: <CAAhSdy33b=EcNnNP80dNqAEpSOErfXenNXHD0GhC4yYPB7L3Ow@mail.gmail.com>
Date: Tue, 22 Oct 2019 10:37:43 +0530
From: Anup Patel <anup@...infault.org>
To: Paolo Bonzini <pbonzini@...hat.com>
Cc: Anup Patel <Anup.Patel@....com>,
Palmer Dabbelt <palmer@...ive.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Radim K <rkrcmar@...hat.com>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Thomas Gleixner <tglx@...utronix.de>,
Alexander Graf <graf@...zon.com>,
Atish Patra <Atish.Patra@....com>,
Alistair Francis <Alistair.Francis@....com>,
Damien Le Moal <Damien.LeMoal@....com>,
Christoph Hellwig <hch@...radead.org>,
"kvm@...r.kernel.org" <kvm@...r.kernel.org>,
"linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v9 20/22] RISC-V: KVM: Fix race-condition in kvm_riscv_vcpu_sync_interrupts()
On Mon, Oct 21, 2019 at 10:57 PM Paolo Bonzini <pbonzini@...hat.com> wrote:
>
> On 16/10/19 18:12, Anup Patel wrote:
> > + /* Read current VSIP and VSIE CSRs */
> > + vsip = csr_read(CSR_VSIP);
> > + csr->vsie = csr_read(CSR_VSIE);
> > +
> > + /* Sync-up VSIP.SSIP bit changes does by Guest */
> > + if ((csr->vsip ^ vsip) & (1UL << IRQ_S_SOFT)) {
> > + if (!test_and_set_bit(IRQ_S_SOFT, &v->irqs_pending_mask)) {
> > + if (vsip & (1UL << IRQ_S_SOFT))
> > + set_bit(IRQ_S_SOFT, &v->irqs_pending);
> > + else
> > + clear_bit(IRQ_S_SOFT, &v->irqs_pending);
> > + }
>
> Looks good, but I wonder if this could just be "csr->vsip =
> csr_read(CSR_VSIP)", which will be fixed up by flush_interrupts on the
> next entry.
It's not just "csr->vsip = csr_read(CSR_VSIP" because "irqs_pending"
bitmap has to be in-sync with Guest updates to VSIP because WFI
trap-n-emulate will check for pending interrupts which in-turn checks
"irqs_pending" bitmap.
Regards,
Anup
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