linux-kernel - [PATCH v3 3/3] ARM: dts: at91: sama5d2: set the sdmmc gclk frequency

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Message-ID: <20191025080344.15492-3-ludovic.desroches@microchip.com>
Date:   Fri, 25 Oct 2019 10:03:44 +0200
From:   Ludovic Desroches <ludovic.desroches@...rochip.com>
To:     <linux-arm-kernel@...ts.infradead.org>,
        <linux-mmc@...r.kernel.org>, <devicetree@...r.kernel.org>
CC:     <ulf.hansson@...aro.org>, <nicolas.ferre@...rochip.com>,
        <adrian.hunter@...el.com>, <linux-kernel@...r.kernel.org>,
        <robh+dt@...nel.org>, <mark.rutland@....com>,
        <claudiu.beznea@...rochip.com>, <Eugen.Hristev@...rochip.com>,
        <alexandre.belloni@...tlin.com>,
        "Ludovic Desroches" <ludovic.desroches@...rochip.com>
Subject: [PATCH v3 3/3] ARM: dts: at91: sama5d2: set the sdmmc gclk frequency

Set the frequency of the generated clock used by sdmmc devices in order
to not rely on the configuration done by previous components.

Signed-off-by: Ludovic Desroches <ludovic.desroches@...rochip.com>
---

Changes:
- v3: none
- v2: none

 arch/arm/boot/dts/sama5d2.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index fa3b9c30a63a..f013c3562724 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -300,6 +300,8 @@ sdmmc0: sdio-host@...00000 {
 			interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
 			clocks = <&pmc PMC_TYPE_PERIPHERAL 31>, <&pmc PMC_TYPE_GCK 31>, <&pmc PMC_TYPE_CORE PMC_MAIN>;
 			clock-names = "hclock", "multclk", "baseclk";
+			assigned-clocks = <&pmc PMC_TYPE_GCK 31>;
+			assigned-clock-rates = <480000000>;
 			status = "disabled";
 		};
 
@@ -309,6 +311,8 @@ sdmmc1: sdio-host@...00000 {
 			interrupts = <32 IRQ_TYPE_LEVEL_HIGH 0>;
 			clocks = <&pmc PMC_TYPE_PERIPHERAL 32>, <&pmc PMC_TYPE_GCK 32>, <&pmc PMC_TYPE_CORE PMC_MAIN>;
 			clock-names = "hclock", "multclk", "baseclk";
+			assigned-clocks = <&pmc PMC_TYPE_GCK 32>;
+			assigned-clock-rates = <480000000>;
 			status = "disabled";
 		};
 
-- 
2.24.0.rc0