linux-kernel - RE: [PATCH v2] RISC-V: Add PCIe I/O BAR memory mapping

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Date:   Tue, 29 Oct 2019 18:22:39 +0000 (UTC)
From:   Paul Walmsley <paul@...an.com>
To:     Yash Shah <yash.shah@...ive.com>
cc:     "Paul Walmsley ( Sifive)" <paul.walmsley@...ive.com>,
        "logang@...tatee.com" <logang@...tatee.com>,
        "sorear2@...il.com" <sorear2@...il.com>,
        "aou@...s.berkeley.edu" <aou@...s.berkeley.edu>,
        "alex@...ti.fr" <alex@...ti.fr>,
        "gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
        "catalin.marinas@....com" <catalin.marinas@....com>,
        "Palmer Dabbelt \\( Sifive\\)" <palmer@...ive.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "rppt@...ux.ibm.com" <rppt@...ux.ibm.com>,
        Sachin Ghadi <sachin.ghadi@...ive.com>,
        "Anup.Patel@....com" <Anup.Patel@....com>,
        Greentime Hu <greentime.hu@...ive.com>,
        "linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>,
        "will@...nel.org" <will@...nel.org>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "allison@...utok.net" <allison@...utok.net>
Subject: RE: [PATCH v2] RISC-V: Add PCIe I/O BAR memory mapping

On Tue, 29 Oct 2019, Yash Shah wrote:

> > On Fri, 25 Oct 2019, Yash Shah wrote:
> > 
> > > For legacy I/O BARs (non-MMIO BARs) to work correctly on RISC-V Linux,
> > > we need to establish a reserved memory region for them, so that
> > > drivers that wish to use the legacy I/O BARs can issue reads and
> > > writes against a memory region that is mapped to the host PCIe
> > > controller's I/O BAR mapping.
> > >
> > > Signed-off-by: Yash Shah <yash.shah@...ive.com>
> > 
> > Thanks.  And just to confirm: this is a fix, right?  Without this 
> > patch, legacy PCIe I/O resources won't be accessible on RISC-V?
> 
> Yes, this is a fix.

Thanks, queued for v5.4-rc.


- Paul