lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CH2PR13MB3368A6E99DAB164A52D2954A8C610@CH2PR13MB3368.namprd13.prod.outlook.com>
Date:   Tue, 29 Oct 2019 04:19:56 +0000
From:   Yash Shah <yash.shah@...ive.com>
To:     "Paul Walmsley ( Sifive)" <paul.walmsley@...ive.com>
CC:     "Paul Walmsley ( Sifive)" <paul.walmsley@...ive.com>,
        "Palmer Dabbelt ( Sifive)" <palmer@...ive.com>,
        "linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "aou@...s.berkeley.edu" <aou@...s.berkeley.edu>,
        "will@...nel.org" <will@...nel.org>,
        "catalin.marinas@....com" <catalin.marinas@....com>,
        "allison@...utok.net" <allison@...utok.net>,
        "gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "Anup.Patel@....com" <Anup.Patel@....com>,
        "rppt@...ux.ibm.com" <rppt@...ux.ibm.com>,
        Greentime Hu <greentime.hu@...ive.com>,
        "alex@...ti.fr" <alex@...ti.fr>,
        "logang@...tatee.com" <logang@...tatee.com>,
        "sorear2@...il.com" <sorear2@...il.com>,
        Sachin Ghadi <sachin.ghadi@...ive.com>
Subject: RE: [PATCH v2] RISC-V: Add PCIe I/O BAR memory mapping

> On Fri, 25 Oct 2019, Yash Shah wrote:
> 
> > For legacy I/O BARs (non-MMIO BARs) to work correctly on RISC-V Linux,
> > we need to establish a reserved memory region for them, so that
> > drivers that wish to use the legacy I/O BARs can issue reads and
> > writes against a memory region that is mapped to the host PCIe
> > controller's I/O BAR mapping.
> >
> > Signed-off-by: Yash Shah <yash.shah@...ive.com>
> 
> Thanks.  And just to confirm: this is a fix, right?  Without this patch, legacy
> PCIe I/O resources won't be accessible on RISC-V?

Yes, this is a fix.

- Yash

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ