linux-kernel - Re: [PATCH v3 07/11] arm64: dts: qcom: sc7180: Add SPMI PMIC arbiter device

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Message-ID: <5db86bb1.1c69fb81.dc254.ec0b@mx.google.com>
Date:   Tue, 29 Oct 2019 09:41:20 -0700
From:   Stephen Boyd <swboyd@...omium.org>
To:     Rajendra Nayak <rnayak@...eaurora.org>, agross@...nel.org,
        bjorn.andersson@...aro.org, robh+dt@...nel.org
Cc:     linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, mka@...omium.org,
        Kiran Gunda <kgunda@...eaurora.org>,
        Rajendra Nayak <rnayak@...eaurora.org>
Subject: Re: [PATCH v3 07/11] arm64: dts: qcom: sc7180: Add SPMI PMIC arbiter device

Quoting Rajendra Nayak (2019-10-23 02:02:15)
> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> index 04808a07d7da..6584ac6e6c7b 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> @@ -224,6 +224,25 @@
>                         };
>                 };
>  
> +               spmi_bus: spmi@...0000 {
> +                       compatible = "qcom,spmi-pmic-arb";
> +                       reg = <0 0xc440000 0 0x1100>,

Please pad out the registers to 8 numbers. See sdm845.

> +                             <0 0xc600000 0 0x2000000>,
> +                             <0 0xe600000 0 0x100000>,
> +                             <0 0xe700000 0 0xa0000>,
> +                             <0 0xc40a000 0 0x26000>;
> +                       reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
> +                       interrupt-names = "periph_irq";
> +                       interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;

This is different than sdm845. I guess pdc is working?

> +                       qcom,ee = <0>;
> +                       qcom,channel = <0>;
> +                       #address-cells = <1>;
> +                       #size-cells = <1>;
> +                       interrupt-controller;
> +                       #interrupt-cells = <4>;
> +                       cell-index = <0>;
> +               };
> +