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Message-ID: <20191029171435.GA1797@bogus>
Date:   Tue, 29 Oct 2019 12:14:35 -0500
From:   Rob Herring <robh@...nel.org>
To:     Radhey Shyam Pandey <radhey.shyam.pandey@...inx.com>
Cc:     vkoul@...nel.org, robh+dt@...nel.org, mark.rutland@....com,
        dan.j.williams@...el.com, michal.simek@...inx.com,
        anirudha.sarangi@...inx.com, nick.graumann@...il.com,
        andrea.merello@...il.com, appana.durga.rao@...inx.com,
        mcgrof@...nel.org, dmaengine@...r.kernel.org,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        Radhey Shyam Pandey <radhey.shyam.pandey@...inx.com>
Subject: Re: [PATCH -next 3/6] dt-bindings: dmaengine: xilinx_dma: Add
 binding for Xilinx MCDMA IP

On Tue, 22 Oct 2019 22:30:19 +0530, Radhey Shyam Pandey wrote:
> Add devicetree binding for Xilinx AXI Multichannel Direct Memory Access
> (AXI MCDMA) IP. The AXI MCDMA provides high-bandwidth direct memory
> access between memory and AXI4-Stream target peripherals. The AXI MCDMA
> core provides a scatter-gather interface with multiple channel support
> with independent configuration.
> 
> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@...inx.com>
> ---
> Keep compatible string one per line. Suggested by Rob.
> Reuse the existing xlnx,axi-dma-* channel names. Suggested by Rob.
> ---
>  .../devicetree/bindings/dma/xilinx/xilinx_dma.txt         | 15 +++++++++++----
>  1 file changed, 11 insertions(+), 4 deletions(-)
> 

Reviewed-by: Rob Herring <robh@...nel.org>

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