linux-kernel - Re: stable-rc-4.19: cpufeature.c:909:21: error: 'MIDR_HISI

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Message-ID: <98f10e13-8ec8-1690-a867-f212bcea969f@huawei.com>
Date:   Mon, 4 Nov 2019 09:10:06 +0800
From:   Hanjun Guo <guohanjun@...wei.com>
To:     Naresh Kamboju <naresh.kamboju@...aro.org>,
        Hanjun Guo <hanjun.guo@...aro.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Sasha Levin <sashal@...nel.org>
CC:     Mark Rutland <mark.rutland@....com>, <suzuki.poulose@....com>,
        <catalin.marinas@....com>, <john.garry@...wei.com>,
        open list <linux-kernel@...r.kernel.org>,
        linux- stable <stable@...r.kernel.org>,
        <zhangshaokun@...ilicon.com>, <lkft-triage@...ts.linaro.org>,
        <andrew.murray@....com>, <will@...nel.org>,
        Dave P Martin <Dave.Martin@....com>,
        <linux-arm-kernel@...ts.infradead.org>
Subject: Re: stable-rc-4.19: cpufeature.c:909:21: error: 'MIDR_HISI_TSV110'
 undeclared

Hi Sasha, Greg,

On 2019/11/4 7:22, Naresh Kamboju wrote:
> stable rc 4.19  branch build broken for arm64 with the below error log,
> 
> Build error log,
> arch/arm64/kernel/cpufeature.c: In function 'unmap_kernel_at_el0':
> arch/arm64/kernel/cpufeature.c:909:21: error: 'MIDR_HISI_TSV110'
> undeclared (first use in this function); did you mean
> 'GICR_ISACTIVER0'?
>   MIDR_ALL_VERSIONS(MIDR_HISI_TSV110),
>                     ^
> arch/arm64/include/asm/cputype.h:141:12: note: in definition of macro
> 'MIDR_RANGE'
>   .model = m,     \
>            ^
> arch/arm64/kernel/cpufeature.c:909:3: note: in expansion of macro
> 'MIDR_ALL_VERSIONS'
>   MIDR_ALL_VERSIONS(MIDR_HISI_TSV110),
>   ^~~~~~~~~~~~~~~~~
> arch/arm64/kernel/cpufeature.c:909:21: note: each undeclared
> identifier is reported only once for each function it appears in
>   MIDR_ALL_VERSIONS(MIDR_HISI_TSV110),
>                     ^
> arch/arm64/include/asm/cputype.h:141:12: note: in definition of macro
> 'MIDR_RANGE'
>   .model = m,     \
>            ^
> arch/arm64/kernel/cpufeature.c:909:3: note: in expansion of macro
> 'MIDR_ALL_VERSIONS'
>   MIDR_ALL_VERSIONS(MIDR_HISI_TSV110),

Patch "efd00c7 arm64: Add MIDR encoding for HiSilicon Taishan CPUs" needs to
be bacported as well, would you like me to do that, or just cherry-pick by yourself?

Thanks
Hanjun