linux-kernel - Re: stable-rc-4.19: cpufeature.c:909:21: error: 'MIDR_HISI

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Mon, 4 Nov 2019 11:59:10 +0100
From:   Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To:     Hanjun Guo <guohanjun@...wei.com>
Cc:     Naresh Kamboju <naresh.kamboju@...aro.org>,
        Hanjun Guo <hanjun.guo@...aro.org>,
        Sasha Levin <sashal@...nel.org>,
        Mark Rutland <mark.rutland@....com>, suzuki.poulose@....com,
        catalin.marinas@....com, john.garry@...wei.com,
        open list <linux-kernel@...r.kernel.org>,
        linux- stable <stable@...r.kernel.org>,
        zhangshaokun@...ilicon.com, lkft-triage@...ts.linaro.org,
        andrew.murray@....com, will@...nel.org,
        Dave P Martin <Dave.Martin@....com>,
        linux-arm-kernel@...ts.infradead.org
Subject: Re: stable-rc-4.19: cpufeature.c:909:21: error: 'MIDR_HISI_TSV110'
 undeclared

On Mon, Nov 04, 2019 at 09:10:06AM +0800, Hanjun Guo wrote:
> Hi Sasha, Greg,
> 
> On 2019/11/4 7:22, Naresh Kamboju wrote:
> > stable rc 4.19  branch build broken for arm64 with the below error log,
> > 
> > Build error log,
> > arch/arm64/kernel/cpufeature.c: In function 'unmap_kernel_at_el0':
> > arch/arm64/kernel/cpufeature.c:909:21: error: 'MIDR_HISI_TSV110'
> > undeclared (first use in this function); did you mean
> > 'GICR_ISACTIVER0'?
> >   MIDR_ALL_VERSIONS(MIDR_HISI_TSV110),
> >                     ^
> > arch/arm64/include/asm/cputype.h:141:12: note: in definition of macro
> > 'MIDR_RANGE'
> >   .model = m,     \
> >            ^
> > arch/arm64/kernel/cpufeature.c:909:3: note: in expansion of macro
> > 'MIDR_ALL_VERSIONS'
> >   MIDR_ALL_VERSIONS(MIDR_HISI_TSV110),
> >   ^~~~~~~~~~~~~~~~~
> > arch/arm64/kernel/cpufeature.c:909:21: note: each undeclared
> > identifier is reported only once for each function it appears in
> >   MIDR_ALL_VERSIONS(MIDR_HISI_TSV110),
> >                     ^
> > arch/arm64/include/asm/cputype.h:141:12: note: in definition of macro
> > 'MIDR_RANGE'
> >   .model = m,     \
> >            ^
> > arch/arm64/kernel/cpufeature.c:909:3: note: in expansion of macro
> > 'MIDR_ALL_VERSIONS'
> >   MIDR_ALL_VERSIONS(MIDR_HISI_TSV110),
> 
> Patch "efd00c7 arm64: Add MIDR encoding for HiSilicon Taishan CPUs" needs to
> be bacported as well, would you like me to do that, or just cherry-pick by yourself?

I need the backport please, cherry-pick fails :(

thanks,

greg k-h