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Message-Id: <20191108.112138.629818881403847512.davem@davemloft.net>
Date: Fri, 08 Nov 2019 11:21:38 -0800 (PST)
From: David Miller <davem@...emloft.net>
To: alexandre.torgue@...com
Cc: christophe.roullier@...com, robh@...nel.org, joabreu@...opsys.com,
mark.rutland@....com, mcoquelin.stm32@...il.com,
peppe.cavallaro@...com, linux-stm32@...md-mailman.stormreply.com,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, netdev@...r.kernel.org,
andrew@...n.ch
Subject: Re: [PATCH V4 net-next 0/4] net: ethernet: stmmac: cleanup clock
and optimization
From: Alexandre Torgue <alexandre.torgue@...com>
Date: Fri, 8 Nov 2019 11:35:23 +0100
> Hi David
>
> On 11/8/19 12:26 AM, David Miller wrote:
>> From: Christophe Roullier <christophe.roullier@...com>
>> Date: Thu, 7 Nov 2019 09:47:53 +0100
>>
>>> Some improvements:
>>> - manage syscfg as optional clock,
>>> - update slew rate of ETH_MDIO pin,
>>> - Enable gating of the MAC TX clock during TX low-power mode
>>>
>>> V4: Update with Andrew Lunn remark
>> This is mostly ARM DT updates, which tree should this go through?
>> I don't want to step on toes this time :-)
>>
>
> I'll take DT patches in my STM32 tree.
Ok, I took patch #1 into net-next.
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