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Message-ID: <8c4efcce-b46f-ac94-a367-50ff5d78c8a2@st.com>
Date: Fri, 8 Nov 2019 11:35:23 +0100
From: Alexandre Torgue <alexandre.torgue@...com>
To: David Miller <davem@...emloft.net>, <christophe.roullier@...com>
CC: <robh@...nel.org>, <joabreu@...opsys.com>, <mark.rutland@....com>,
<mcoquelin.stm32@...il.com>, <peppe.cavallaro@...com>,
<linux-stm32@...md-mailman.stormreply.com>,
<linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>, <netdev@...r.kernel.org>,
<andrew@...n.ch>
Subject: Re: [PATCH V4 net-next 0/4] net: ethernet: stmmac: cleanup clock and
optimization
Hi David
On 11/8/19 12:26 AM, David Miller wrote:
> From: Christophe Roullier <christophe.roullier@...com>
> Date: Thu, 7 Nov 2019 09:47:53 +0100
>
>> Some improvements:
>> - manage syscfg as optional clock,
>> - update slew rate of ETH_MDIO pin,
>> - Enable gating of the MAC TX clock during TX low-power mode
>>
>> V4: Update with Andrew Lunn remark
>
> This is mostly ARM DT updates, which tree should this go through?
>
> I don't want to step on toes this time :-)
>
I'll take DT patches in my STM32 tree.
Thanks
Alex
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