linux-kernel - [PATCH 2/7] clk: zynqmp: Extend driver for versal

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Message-Id: <1573564580-9006-3-git-send-email-rajan.vaja@xilinx.com>
Date:   Tue, 12 Nov 2019 05:16:15 -0800
From:   Rajan Vaja <rajan.vaja@...inx.com>
To:     mturquette@...libre.com, sboyd@...nel.org, robh+dt@...nel.org,
        mark.rutland@....com, michal.simek@...inx.com,
        m.tretter@...gutronix.de, jolly.shah@...inx.com,
        dan.carpenter@...cle.com, gustavo@...eddedor.com,
        tejas.patel@...inx.com, nava.manne@...inx.com,
        ravi.patel@...inx.com
Cc:     linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        Rajan Vaja <rajan.vaja@...inx.com>
Subject: [PATCH 2/7] clk: zynqmp: Extend driver for versal

Add Versal compatible string to support Versal
binding.

Signed-off-by: Jolly Shah <jolly.shah@...inx.com>
Signed-off-by: Michal Simek <michal.simek@...inx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@...inx.com>
---
 drivers/clk/zynqmp/clkc.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/zynqmp/clkc.c b/drivers/clk/zynqmp/clkc.c
index a11f93e..10e89f2 100644
--- a/drivers/clk/zynqmp/clkc.c
+++ b/drivers/clk/zynqmp/clkc.c
@@ -2,7 +2,7 @@
 /*
  * Zynq UltraScale+ MPSoC clock controller
  *
- *  Copyright (C) 2016-2018 Xilinx
+ *  Copyright (C) 2016-2019 Xilinx
  *
  * Based on drivers/clk/zynq/clkc.c
  */
@@ -749,6 +749,7 @@ static int zynqmp_clock_probe(struct platform_device *pdev)
 
 static const struct of_device_id zynqmp_clock_of_match[] = {
 	{.compatible = "xlnx,zynqmp-clk"},
+	{.compatible = "xlnx,versal-clk"},
 	{},
 };
 MODULE_DEVICE_TABLE(of, zynqmp_clock_of_match);
-- 
2.7.4