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Message-ID: <1573638817-4363-2-git-send-email-peng.fan@nxp.com>
Date: Wed, 13 Nov 2019 10:02:09 +0000
From: Peng Fan <peng.fan@....com>
To: "sboyd@...nel.org" <sboyd@...nel.org>,
"shawnguo@...nel.org" <shawnguo@...nel.org>,
"s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
"festevam@...il.com" <festevam@...il.com>,
Abel Vesa <abel.vesa@....com>
CC: "kernel@...gutronix.de" <kernel@...gutronix.de>,
dl-linux-imx <linux-imx@....com>,
Aisheng Dong <aisheng.dong@....com>,
"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Leonard Crestez <leonard.crestez@....com>,
Alice Guo <alice.guo@....com>, Peng Fan <peng.fan@....com>
Subject: [PATCH 2/2] clk: imx: composite-8m: use relaxed io api
From: Peng Fan <peng.fan@....com>
It is ok to use relaxed api here, no need to use stronger readl/writel
Signed-off-by: Peng Fan <peng.fan@....com>
---
drivers/clk/imx/clk-composite-8m.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers/clk/imx/clk-composite-8m.c
index 20f7c91c03d2..513dc57483d0 100644
--- a/drivers/clk/imx/clk-composite-8m.c
+++ b/drivers/clk/imx/clk-composite-8m.c
@@ -31,14 +31,14 @@ static unsigned long imx8m_clk_composite_divider_recalc_rate(struct clk_hw *hw,
unsigned int prediv_value;
unsigned int div_value;
- prediv_value = readl(divider->reg) >> divider->shift;
+ prediv_value = readl_relaxed(divider->reg) >> divider->shift;
prediv_value &= clk_div_mask(divider->width);
prediv_rate = divider_recalc_rate(hw, parent_rate, prediv_value,
NULL, divider->flags,
divider->width);
- div_value = readl(divider->reg) >> PCG_DIV_SHIFT;
+ div_value = readl_relaxed(divider->reg) >> PCG_DIV_SHIFT;
div_value &= clk_div_mask(PCG_DIV_WIDTH);
return divider_recalc_rate(hw, prediv_rate, div_value, NULL,
@@ -104,13 +104,13 @@ static int imx8m_clk_composite_divider_set_rate(struct clk_hw *hw,
spin_lock_irqsave(divider->lock, flags);
- val = readl(divider->reg);
+ val = readl_relaxed(divider->reg);
val &= ~((clk_div_mask(divider->width) << divider->shift) |
(clk_div_mask(PCG_DIV_WIDTH) << PCG_DIV_SHIFT));
val |= (u32)(prediv_value - 1) << divider->shift;
val |= (u32)(div_value - 1) << PCG_DIV_SHIFT;
- writel(val, divider->reg);
+ writel_relaxed(val, divider->reg);
spin_unlock_irqrestore(divider->lock, flags);
--
2.16.4
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