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Message-ID: <CH2PR13MB3368254D0684E46A2C47AE418C4D0@CH2PR13MB3368.namprd13.prod.outlook.com>
Date:   Mon, 18 Nov 2019 07:14:27 +0000
From:   Yash Shah <yash.shah@...ive.com>
To:     Marc Zyngier <maz@...nel.org>
CC:     "linus.walleij@...aro.org" <linus.walleij@...aro.org>,
        "bgolaszewski@...libre.com" <bgolaszewski@...libre.com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "palmer@...belt.com" <palmer@...belt.com>,
        "Paul Walmsley ( Sifive)" <paul.walmsley@...ive.com>,
        "aou@...s.berkeley.edu" <aou@...s.berkeley.edu>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "jason@...edaemon.net" <jason@...edaemon.net>,
        "bmeng.cn@...il.com" <bmeng.cn@...il.com>,
        "atish.patra@....com" <atish.patra@....com>,
        Sagar Kadam <sagar.kadam@...ive.com>,
        "linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Sachin Ghadi <sachin.ghadi@...ive.com>
Subject: RE: [PATCH 1/4] irqchip: sifive: Support hierarchy irq domain

> -----Original Message-----
> From: Marc Zyngier <maz@...nel.org>
> Sent: 12 November 2019 18:13
> To: Yash Shah <yash.shah@...ive.com>
> Cc: linus.walleij@...aro.org; bgolaszewski@...libre.com;
> robh+dt@...nel.org; mark.rutland@....com; palmer@...belt.com; Paul
> Walmsley ( Sifive) <paul.walmsley@...ive.com>; aou@...s.berkeley.edu;
> tglx@...utronix.de; jason@...edaemon.net; bmeng.cn@...il.com;
> atish.patra@....com; Sagar Kadam <sagar.kadam@...ive.com>; linux-
> gpio@...r.kernel.org; devicetree@...r.kernel.org; linux-
> riscv@...ts.infradead.org; linux-kernel@...r.kernel.org; Sachin Ghadi
> <sachin.ghadi@...ive.com>
> Subject: Re: [PATCH 1/4] irqchip: sifive: Support hierarchy irq domain
> 
> On 2019-11-12 13:21, Yash Shah wrote:
> > Add support for hierarchy irq domains. This is needed as pre-requisite
> > for gpio-sifive driver.
> >
> > Signed-off-by: Yash Shah <yash.shah@...ive.com>
> > ---
> >  drivers/irqchip/Kconfig           |  1 +
> >  drivers/irqchip/irq-sifive-plic.c | 41
> > +++++++++++++++++++++++++++++++++++----
> >  2 files changed, 38 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index
> > ccbb897..a398552 100644
> > --- a/drivers/irqchip/Kconfig
> > +++ b/drivers/irqchip/Kconfig
> > @@ -488,6 +488,7 @@ endmenu
> >  config SIFIVE_PLIC
> >  	bool "SiFive Platform-Level Interrupt Controller"
> >  	depends on RISCV
> > +	select IRQ_DOMAIN_HIERARCHY
> >  	help
...
> >
> > +static int plic_irq_domain_translate(struct irq_domain *d,
> > +				     struct irq_fwspec *fwspec,
> > +				     unsigned long *hwirq, unsigned int *type)
> {
> > +	if (WARN_ON(fwspec->param_count < 1))
> > +		return -EINVAL;
> > +	*hwirq = fwspec->param[0];
> > +	*type = IRQ_TYPE_NONE;
> > +	return 0;
> > +}
> 
> This is actually what should be called irq_domain_translate_onecell().
> 
> Consider implementing that instead, and using it in this driver. I'm pretty sure
> other drivers could use it (I spotted irq-nvic.c).

Sure, will implement irq_domain_translate_onecell() and use that instead.
Thanks for your comments!

- Yash

> 
> >
> >  static struct irq_domain *plic_irqdomain;
> 
> Otherwise, looks OK.
> 
> Thanks,
> 
>          M.
> --
> Jazz is not dead. It just smells funny...

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