[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <20191120112923.431-1-Eugeniy.Paltsev@synopsys.com>
Date: Wed, 20 Nov 2019 14:29:22 +0300
From: Eugeniy Paltsev <Eugeniy.Paltsev@...opsys.com>
To: linux-snps-arc@...ts.infradead.org,
Vineet Gupta <Vineet.Gupta1@...opsys.com>
Cc: linux-kernel@...r.kernel.org,
Alexey Brodkin <Alexey.Brodkin@...opsys.com>,
Eugeniy Paltsev <Eugeniy.Paltsev@...opsys.com>
Subject: [PATCH v2 1/2] ARC: [plat-axs10x]: use pgu pll instead of fixed clock
Use PLL driver instead of fixed-clock for PGU pixel clock.
That allows us to support wider range of graphic modes.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@...opsys.com>
---
Changes v1->v2:
* add missing input_clk node to AXS101. No changes for AXS103 /
AXS103 SMP.
arch/arc/boot/dts/axc001.dtsi | 6 ++++++
arch/arc/boot/dts/axs10x_mb.dtsi | 11 ++++++-----
2 files changed, 12 insertions(+), 5 deletions(-)
diff --git a/arch/arc/boot/dts/axc001.dtsi b/arch/arc/boot/dts/axc001.dtsi
index 6ec1fcdfc0d7..79ec27c043c1 100644
--- a/arch/arc/boot/dts/axc001.dtsi
+++ b/arch/arc/boot/dts/axc001.dtsi
@@ -28,6 +28,12 @@
clock-frequency = <750000000>;
};
+ input_clk: input-clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <33333333>;
+ };
+
core_intc: arc700-intc@cpu {
compatible = "snps,arc700-intc";
interrupt-controller;
diff --git a/arch/arc/boot/dts/axs10x_mb.dtsi b/arch/arc/boot/dts/axs10x_mb.dtsi
index 08bcfed6b80f..f9a5c9ddcae7 100644
--- a/arch/arc/boot/dts/axs10x_mb.dtsi
+++ b/arch/arc/boot/dts/axs10x_mb.dtsi
@@ -61,12 +61,13 @@
clock-frequency = <25000000>;
#clock-cells = <0>;
};
+ };
- pguclk: pguclk {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <74250000>;
- };
+ pguclk: pguclk@...80 {
+ compatible = "snps,axs10x-pgu-pll-clock";
+ reg = <0x10080 0x10>, <0x110 0x10>;
+ #clock-cells = <0>;
+ clocks = <&input_clk>;
};
gmac: ethernet@...00 {
--
2.21.0
Powered by blists - more mailing lists