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Message-Id: <1574326274-121890-1-git-send-email-manish.narani@xilinx.com>
Date: Thu, 21 Nov 2019 14:21:14 +0530
From: Manish Narani <manish.narani@...inx.com>
To: robh+dt@...nel.org, mark.rutland@....com, michal.simek@...inx.com,
liviu.dudau@....com, treding@...dia.com, chanho.min@....com,
matthias.bgg@...il.com, rrichter@...ium.com,
manish.narani@...inx.com
Cc: devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, git@...inx.com
Subject: [PATCH v4] arm64: zynqmp: Add ZynqMP SDHCI compatible string
Add the new compatible string for ZynqMP SD Host Controller for its use
in the Arasan SDHCI driver for some of the ZynqMP specific operations.
Add required properties for the same.
Signed-off-by: Manish Narani <manish.narani@...inx.com>
---
This patch depends on the below series of patches:
https://lkml.org/lkml/2019/11/20/366
Changes in v2:
- Added clock-names for SD card clocks for getting clocks in the driver
Changes in v3:
- Reverted "Added clock-names for SD card clocks for getting clocks in the driver"
Changes in v4:
- Removed extra compatible property from v3
---
arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 9aa67340a4d8..de09ebe608e1 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -493,21 +493,25 @@
};
sdhci0: mmc@...60000 {
- compatible = "arasan,sdhci-8.9a";
+ compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 48 4>;
reg = <0x0 0xff160000 0x0 0x1000>;
clock-names = "clk_xin", "clk_ahb";
+ #clock-cells = <1>;
+ clock-output-names = "clk_out_sd0", "clk_in_sd0";
};
sdhci1: mmc@...70000 {
- compatible = "arasan,sdhci-8.9a";
+ compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 49 4>;
reg = <0x0 0xff170000 0x0 0x1000>;
clock-names = "clk_xin", "clk_ahb";
+ #clock-cells = <1>;
+ clock-output-names = "clk_out_sd1", "clk_in_sd1";
};
smmu: smmu@...00000 {
--
2.17.1
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