linux-kernel - Re: [PATCH v8 2/3] dwc: PCI: intel: PCIe RC controller driver

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Message-ID: <8545714b-9393-3272-9d58-35a91d1681cf@linux.intel.com>
Date:   Thu, 21 Nov 2019 16:52:16 +0800
From:   Dilip Kota <eswara.kota@...ux.intel.com>
To:     Andy Shevchenko <andriy.shevchenko@...el.com>
Cc:     gustavo.pimentel@...opsys.com, lorenzo.pieralisi@....com,
        andrew.murray@....com, helgaas@...nel.org, jingoohan1@...il.com,
        robh@...nel.org, martin.blumenstingl@...glemail.com,
        linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, cheol.yong.kim@...el.com,
        chuanhua.lei@...ux.intel.com, qi-ming.wu@...el.com
Subject: Re: [PATCH v8 2/3] dwc: PCI: intel: PCIe RC controller driver


On 11/20/2019 9:08 PM, Andy Shevchenko wrote:
> On Wed, Nov 20, 2019 at 03:43:01PM +0800, Dilip Kota wrote:
>> Add support to PCIe RC controller on Intel Gateway SoCs.
>> PCIe controller is based of Synopsys DesignWare PCIe core.
>>
>> Intel PCIe driver requires Upconfigure support, Fast Training
>> Sequence and link speed configurations. So adding the respective
>> helper functions in the PCIe DesignWare framework.
>> It also programs hardware autonomous speed during speed
>> configuration so defining it in pci_regs.h.
>> +static void pcie_app_wr_mask(struct intel_pcie_port *lpp,
>> +			     u32 ofs, u32 mask, u32 val)
> It seems your editor is misconfigured. First line should be
>
> static void pcie_app_wr_mask(struct intel_pcie_port *lpp, u32 ofs,
>
> in case you would like to split it logically.
>
>> +static void pcie_rc_cfg_wr_mask(struct intel_pcie_port *lpp,
>> +				u32 ofs, u32 mask, u32 val)
> Ditto.
>
>> +	pcie_app_wr(lpp,  PCIE_APP_IRNCR, PCIE_APP_IRN_INT);
> Extra white space.
My bad, typo error. Will fix them all in the next patch version.

Regards,
Dilip

>