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Message-ID: <460fa79d-76e8-d8be-8a9a-040d0e6df344@amd.com>
Date: Tue, 26 Nov 2019 15:41:52 +0530
From: "Agrawal, Akshu" <aagrawal2@....com>
To: Yu-Hsuan Hsu <yuhsuan@...omium.org>, linux-kernel@...r.kernel.org
Cc: Liam Girdwood <lgirdwood@...il.com>,
Mark Brown <broonie@...nel.org>,
Jaroslav Kysela <perex@...ex.cz>,
Takashi Iwai <tiwai@...e.com>,
Agrawal Akshu <Akshu.Agrawal@....com>,
Andi Kleen <ak@...ux.intel.com>,
Adam Thomson <Adam.Thomson.Opensource@...semi.com>,
Kuninori Morimoto <kuninori.morimoto.gx@...esas.com>,
alsa-devel@...a-project.org, Tzung-Bi Shih <tzungbi@...gle.com>
Subject: Re: [PATCH] ASoC: AMD: Enable clk in startup intead of hw_params
On 11/26/2019 1:24 PM, Yu-Hsuan Hsu wrote:
> Some usages only call startup and shutdown without setting hw_params
> (e.g. arecord --dump-hw-params). If we don't enable clk in startup, it
> will cause ref count error because the clk will be disabled in shutdown.
> For this reason, we should move enabling clk from hw_params to startup.
>
> In addition, the hw_params is fixed in this driver(48000 rate, 2
> channels, S16_LE format) so we don't need to change the clk rate after
> the hw_params is set.
>
> Signed-off-by: Yu-Hsuan Hsu <yuhsuan@...omium.org>
> ---
> sound/soc/amd/acp-da7219-max98357a.c | 46 +++++++++-------------------
> 1 file changed, 14 insertions(+), 32 deletions(-)
>
> diff --git a/sound/soc/amd/acp-da7219-max98357a.c b/sound/soc/amd/acp-da7219-max98357a.c
> index f4ee6798154af5..7a5621e5e2330d 100644
> --- a/sound/soc/amd/acp-da7219-max98357a.c
> +++ b/sound/soc/amd/acp-da7219-max98357a.c
> @@ -96,14 +96,19 @@ static int cz_da7219_init(struct snd_soc_pcm_runtime *rtd)
> return 0;
> }
>
> -static int da7219_clk_enable(struct snd_pcm_substream *substream,
> - int wclk_rate, int bclk_rate)
> +static int da7219_clk_enable(struct snd_pcm_substream *substream)
> {
> int ret = 0;
> struct snd_soc_pcm_runtime *rtd = substream->private_data;
>
> - clk_set_rate(da7219_dai_wclk, wclk_rate);
> - clk_set_rate(da7219_dai_bclk, bclk_rate);
> + /*
> + * Set wclk to 48000 because the rate constraint of this driver is
> + * 48000. ADAU7002 spec: "The ADAU7002 requires a BCLK rate that is
> + * minimum of 64x the LRCLK sample rate." DA7219 is the only clk
> + * source so for all codecs we have to limit bclk to 64X lrclk.
> + */
> + clk_set_rate(da7219_dai_wclk, 48000);
> + clk_set_rate(da7219_dai_bclk, 48000 * 64);
> ret = clk_prepare_enable(da7219_dai_bclk);
> if (ret < 0) {
> dev_err(rtd->dev, "can't enable master clock %d\n", ret);
> @@ -156,7 +161,7 @@ static int cz_da7219_play_startup(struct snd_pcm_substream *substream)
> &constraints_rates);
>
> machine->play_i2s_instance = I2S_SP_INSTANCE;
> - return 0;
> + return da7219_clk_enable(substream);
> }
>
> static int cz_da7219_cap_startup(struct snd_pcm_substream *substream)
> @@ -178,7 +183,7 @@ static int cz_da7219_cap_startup(struct snd_pcm_substream *substream)
>
> machine->cap_i2s_instance = I2S_SP_INSTANCE;
> machine->capture_channel = CAP_CHANNEL1;
> - return 0;
> + return da7219_clk_enable(substream);
> }
>
> static int cz_max_startup(struct snd_pcm_substream *substream)
> @@ -199,7 +204,7 @@ static int cz_max_startup(struct snd_pcm_substream *substream)
> &constraints_rates);
>
> machine->play_i2s_instance = I2S_BT_INSTANCE;
> - return 0;
> + return da7219_clk_enable(substream);
> }
>
> static int cz_dmic0_startup(struct snd_pcm_substream *substream)
> @@ -220,7 +225,7 @@ static int cz_dmic0_startup(struct snd_pcm_substream *substream)
> &constraints_rates);
>
> machine->cap_i2s_instance = I2S_BT_INSTANCE;
> - return 0;
> + return da7219_clk_enable(substream);
> }
>
> static int cz_dmic1_startup(struct snd_pcm_substream *substream)
> @@ -242,25 +247,7 @@ static int cz_dmic1_startup(struct snd_pcm_substream *substream)
>
> machine->cap_i2s_instance = I2S_SP_INSTANCE;
> machine->capture_channel = CAP_CHANNEL0;
> - return 0;
> -}
> -
> -static int cz_da7219_params(struct snd_pcm_substream *substream,
> - struct snd_pcm_hw_params *params)
> -{
> - int wclk, bclk;
> -
> - wclk = params_rate(params);
> - bclk = wclk * params_channels(params) *
> - snd_pcm_format_width(params_format(params));
> - /* ADAU7002 spec: "The ADAU7002 requires a BCLK rate
> - * that is minimum of 64x the LRCLK sample rate."
> - * DA7219 is the only clk source so for all codecs
> - * we have to limit bclk to 64X lrclk.
> - */
> - if (bclk < (wclk * 64))
> - bclk = wclk * 64;
> - return da7219_clk_enable(substream, wclk, bclk);
> + return da7219_clk_enable(substream);
> }
>
> static void cz_da7219_shutdown(struct snd_pcm_substream *substream)
> @@ -271,31 +258,26 @@ static void cz_da7219_shutdown(struct snd_pcm_substream *substream)
> static const struct snd_soc_ops cz_da7219_play_ops = {
> .startup = cz_da7219_play_startup,
> .shutdown = cz_da7219_shutdown,
> - .hw_params = cz_da7219_params,
> };
>
> static const struct snd_soc_ops cz_da7219_cap_ops = {
> .startup = cz_da7219_cap_startup,
> .shutdown = cz_da7219_shutdown,
> - .hw_params = cz_da7219_params,
> };
>
> static const struct snd_soc_ops cz_max_play_ops = {
> .startup = cz_max_startup,
> .shutdown = cz_da7219_shutdown,
> - .hw_params = cz_da7219_params,
> };
>
> static const struct snd_soc_ops cz_dmic0_cap_ops = {
> .startup = cz_dmic0_startup,
> .shutdown = cz_da7219_shutdown,
> - .hw_params = cz_da7219_params,
> };
>
> static const struct snd_soc_ops cz_dmic1_cap_ops = {
> .startup = cz_dmic1_startup,
> .shutdown = cz_da7219_shutdown,
> - .hw_params = cz_da7219_params,
> };
>
> SND_SOC_DAILINK_DEF(designware1,
Acked-by: Akshu Agrawal <akshu.agarawal@....com>
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