linux-kernel - RE: [PATCH v3 5/6] gpio: sifive: Add GPIO driver for SiFive SoCs

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Message-ID: <CH2PR13MB33682C26386CB4EE8A7EA1C98C460@CH2PR13MB3368.namprd13.prod.outlook.com>
Date:   Fri, 29 Nov 2019 06:27:35 +0000
From:   Yash Shah <yash.shah@...ive.com>
To:     Linus Walleij <linus.walleij@...aro.org>,
        "maz@...nel.org" <maz@...nel.org>
CC:     "bgolaszewski@...libre.com" <bgolaszewski@...libre.com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "palmer@...belt.com" <palmer@...belt.com>,
        "Paul Walmsley ( Sifive)" <paul.walmsley@...ive.com>,
        "aou@...s.berkeley.edu" <aou@...s.berkeley.edu>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "jason@...edaemon.net" <jason@...edaemon.net>,
        "bmeng.cn@...il.com" <bmeng.cn@...il.com>,
        "atish.patra@....com" <atish.patra@....com>,
        Sagar Kadam <sagar.kadam@...ive.com>,
        "linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Sachin Ghadi <sachin.ghadi@...ive.com>
Subject: RE: [PATCH v3 5/6] gpio: sifive: Add GPIO driver for SiFive SoCs

> -----Original Message-----
> From: Linus Walleij <linus.walleij@...aro.org>
> Sent: 28 November 2019 17:50
> To: Yash Shah <yash.shah@...ive.com>
> Cc: bgolaszewski@...libre.com; robh+dt@...nel.org;
> mark.rutland@....com; palmer@...belt.com; Paul Walmsley ( Sifive)
> <paul.walmsley@...ive.com>; aou@...s.berkeley.edu; tglx@...utronix.de;
> jason@...edaemon.net; maz@...nel.org; bmeng.cn@...il.com;
> atish.patra@....com; Sagar Kadam <sagar.kadam@...ive.com>; linux-
> gpio@...r.kernel.org; devicetree@...r.kernel.org; linux-
> riscv@...ts.infradead.org; linux-kernel@...r.kernel.org; Sachin Ghadi
> <sachin.ghadi@...ive.com>
> Subject: Re: [PATCH v3 5/6] gpio: sifive: Add GPIO driver for SiFive SoCs
> 
> On Mon, Nov 25, 2019 at 6:58 AM Yash Shah <yash.shah@...ive.com> wrote:
> 
> > Adds the GPIO driver for SiFive RISC-V SoCs.
> >
> > Signed-off-by: Wesley W. Terpstra <wesley@...ive.com>
> > [Atish: Various fixes and code cleanup]
> > Signed-off-by: Atish Patra <atish.patra@....com>
> > Signed-off-by: Yash Shah <yash.shah@...ive.com>
> 
> Reviewed-by: Linus Walleij <linus.walleij@...aro.org>
> 
> I suppose Marc will merge all patches into the irqchip tree as they are logically
> dependent? If you want the GPIO bindings and this driver directly merged
> (no deps) then I can do that as well.

Yes, the GPIO driver have logical dependency on irqchip patches. It is best if Marc merges all the patches into the irqchip tree.

@Marc Zyngier, Are you going to merge all the patches into the irqchip tree?

- Yash