[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <b3c568f1-d57b-f3f3-b1da-4b312c595fc8@gmail.com>
Date: Sat, 7 Dec 2019 09:40:50 -0800
From: Florian Fainelli <f.fainelli@...il.com>
To: Stanley Chu <stanley.chu@...iatek.com>, linux-scsi@...r.kernel.org,
martin.petersen@...cle.com, avri.altman@....com,
alim.akhtar@...sung.com, pedrom.sousa@...opsys.com,
jejb@...ux.ibm.com, matthias.bgg@...il.com
Cc: linux-mediatek@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
beanhuo@...ron.com, kuohong.wang@...iatek.com,
peter.wang@...iatek.com, chun-hung.wu@...iatek.com,
andy.teng@...iatek.com, leon.chen@...iatek.com
Subject: Re: [PATCH v1 1/2] soc: mediatek: add header for SiP service
interface
On 12/6/2019 10:39 PM, Stanley Chu wrote:
> Add a header for the SiP service interface defined to access
> the UFSHCI controller handling secure commands in MediaTek Chipsets.
>
> Signed-off-by: Stanley Chu <stanley.chu@...iatek.com>
> ---
> include/linux/soc/mediatek/mtk_sip_svc.h | 26 ++++++++++++++++++++++++
> 1 file changed, 26 insertions(+)
> create mode 100644 include/linux/soc/mediatek/mtk_sip_svc.h
>
> diff --git a/include/linux/soc/mediatek/mtk_sip_svc.h b/include/linux/soc/mediatek/mtk_sip_svc.h
> new file mode 100644
> index 000000000000..7b69aa06f58d
> --- /dev/null
> +++ b/include/linux/soc/mediatek/mtk_sip_svc.h
> @@ -0,0 +1,26 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Copyright (C) 2019 MediaTek Inc.
> + */
> +
> +#ifndef __MTK_SIP_SVC_H
> +#define __MTK_SIP_SVC_H
> +
> +/* Error Code */
> +#define SIP_SVC_E_SUCCESS 0
> +#define SIP_SVC_E_NOT_SUPPORTED -1
> +#define SIP_SVC_E_INVALID_PARAMS -2
> +#define SIP_SVC_E_INVALID_RANGE -3
> +#define SIP_SVC_E_PERMISSION_DENIED -4
> +
> +#ifdef CONFIG_ARM64
> +#define MTK_SIP_SMC_AARCH_BIT 0x40000000
> +#else
> +#define MTK_SIP_SMC_AARCH_BIT 0x00000000
> +#endif
Cannot you use the definitions from include/linux/arm-smccc.h and use
ARM_SMCCC_CALL_CONV_SHIFT here and associated helpers?
> +
> +/* UFS related SMC call */
> +#define MTK_SIP_UFS_CONTROL \
> + (0x82000276 | MTK_SIP_SMC_AARCH_BIT)
Does bit 31 map to the fast vs. slow call of the ARM SMCCC convention or
does it have a different meaning (should not). Likewise bit 25 would be
ARM_SMMCCC_OWNER_SIP no?
That would leave us with only 0x276 which is a valid function number.
--
Florian
Powered by blists - more mailing lists