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Message-Id: <cover.1575860791.git.eswara.kota@linux.intel.com>
Date: Mon, 9 Dec 2019 11:20:03 +0800
From: Dilip Kota <eswara.kota@...ux.intel.com>
To: lorenzo.pieralisi@....com, linux-pci@...r.kernel.org,
devicetree@...r.kernel.org
Cc: jingoohan1@...il.com, gustavo.pimentel@...opsys.com,
andrew.murray@....com, robh@...nel.org,
linux-kernel@...r.kernel.org, andriy.shevchenko@...el.com,
cheol.yong.kim@...el.com, chuanhua.lei@...ux.intel.com,
qi-ming.wu@...el.com, Dilip Kota <eswara.kota@...ux.intel.com>
Subject: [PATCH v11 0/3] PCI: Add Intel PCIe Driver and respective dt-binding yaml file
Intel PCIe is Synopsys based controller. Intel PCIe driver uses
DesignWare PCIe framework for host initialization and register
configurations.
Changes on v11:
Patches rebase on kernel v5.5-rc1
Dilip Kota (3):
dt-bindings: PCI: intel: Add YAML schemas for the PCIe RC controller
PCI: dwc: intel: PCIe RC controller driver
PCI: artpec6: Configure FTS with dwc helper function
.../devicetree/bindings/pci/intel-gw-pcie.yaml | 138 ++++++
drivers/pci/controller/dwc/Kconfig | 11 +
drivers/pci/controller/dwc/Makefile | 1 +
drivers/pci/controller/dwc/pcie-artpec6.c | 8 +-
drivers/pci/controller/dwc/pcie-designware.c | 57 +++
drivers/pci/controller/dwc/pcie-designware.h | 12 +
drivers/pci/controller/dwc/pcie-intel-gw.c | 545 +++++++++++++++++++++
include/uapi/linux/pci_regs.h | 1 +
8 files changed, 766 insertions(+), 7 deletions(-)
create mode 100644 Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml
create mode 100644 drivers/pci/controller/dwc/pcie-intel-gw.c
--
2.11.0
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