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Message-ID: <20191209154932.dyysdktbosi3vlbx@e107158-lin.cambridge.arm.com>
Date:   Mon, 9 Dec 2019 15:49:32 +0000
From:   Qais Yousef <qais.yousef@....com>
To:     Marc Zyngier <maz@...nel.org>
Cc:     Hannes Reinecke <hare@...e.de>, John Garry <john.garry@...wei.com>,
        Ming Lei <ming.lei@...hat.com>, tglx@...utronix.de,
        chenxiang66@...ilicon.com, bigeasy@...utronix.de,
        linux-kernel@...r.kernel.org, hare@...e.com, hch@....de,
        axboe@...nel.dk, bvanassche@....org, peterz@...radead.org,
        mingo@...hat.com
Subject: Re: [PATCH RFC 1/1] genirq: Make threaded handler use irq affinity
  for managed interrupt

On 12/09/19 15:17, Marc Zyngier wrote:
> On 2019-12-09 15:09, Hannes Reinecke wrote:
> 
> [slight digression]
> 
> > My idea here is slightly different: can't we leverage SMT?
> > Most modern CPUs do SMT (I guess even ARM does it nowadays)
> > (Yes, I know about spectre and things. We're talking performance here
> > :-)
> 
> I only know two of those: Cavium TX2 and ARM Neoverse-E1.

There's the Cortex-A65 too.

--
Qais Yousef

> ARM SMT CPUs are the absolute minority (and I can't say I'm displeased).
> 
>         M,
> -- 
> Jazz is not dead. It just smells funny...

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