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Message-ID: <2d931347-d927-4674-86ff-7eb285624bfc@microchip.com>
Date: Tue, 10 Dec 2019 16:41:39 +0000
From: <Tudor.Ambarus@...rochip.com>
To: <vigneshr@...com>
CC: <miquel.raynal@...tlin.com>, <richard@....at>,
<Ashish.Kumar@....com>, <linux-mtd@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <john.garry@...wei.com>
Subject: Re: [PATCH 3/3] mtd: spi-nor: Add USE_FSR flag for n25q* entries
Hi, Vignesh,
On 12/5/19 8:59 AM, Vignesh Raghavendra wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Add USE_FSR flag to all variants of n25q entries that support Flag Status
> Register.
On a first look, all Micron flashes define the Flag Status Register. Do you know
if there are any Micron flash that don't support FSR? If not, would you be
interested in doing some documentation work to check this?
I think we can do this more generic, always set SNOR_F_USE_FSR for micron
flashes, like below. More, if FSR is specific just for Micron, we can get rid of
the USE_FSR flag too.
Thanks, Vignesh.
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index f4afe123e9dc..fe10beea60c3 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -4595,7 +4595,7 @@ static void sst_set_default_init(struct spi_nor *nor)
static void st_micron_set_default_init(struct spi_nor *nor)
{
- nor->flags |= SNOR_F_HAS_LOCK;
+ nor->flags |= SNOR_F_HAS_LOCK | SNOR_F_USE_FSR;
nor->params.quad_enable = NULL;
nor->params.set_4byte = st_micron_set_4byte;
}
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