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Message-Id: <20191210000623.22321-1-michael@walle.cc>
Date:   Tue, 10 Dec 2019 01:06:23 +0100
From:   Michael Walle <michael@...le.cc>
To:     yinbo.zhu@....com
Cc:     Ashish.Kumar@....com, alexandru.marginean@....com,
        alison.wang@....com, amit.jain_1@....com,
        catalin.horghidan@....com, claudiu.manoil@....com,
        devicetree@...r.kernel.org, jiafei.pan@....com, leoyang.li@....com,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linuxppc-dev@...ts.ozlabs.org, mark.rutland@....com,
        rajat.srivastava@....com, rajesh.bhagat@....com,
        robh+dt@...nel.org, vabhav.sharma@....com, xiaobo.xie@....com,
        yangbo.lu@....com, Michael Walle <michael@...le.cc>
Subject: Re: [PATCH v1 3/4] arm64: dts: ls1028a: fix little-big endian issue for dcfg

> dcfg use little endian that SoC register value will be correct
> 
> Signed-off-by: Yinbo Zhu <yinbo.zhu@....com>
> ---
>  arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

This patch is still missing. Any news?

Tested-by: Michael Walle <michael@...le.cc>

> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> index b0d4f8916ede..5538e8e354b2 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> @@ -162,7 +162,7 @@
>  		dcfg: syscon@...0000 {
>  			compatible = "fsl,ls1028a-dcfg", "syscon";
>  			reg = <0x0 0x1e00000 0x0 0x10000>;
> -			big-endian;
> +			little-endian;
>  		};
>  
>  		scfg: syscon@...0000 {
> -- 
> 2.17.1
> 

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