linux-kernel - Re: [PATCH v17 6/6] arm64: dts: add gce node for mt8183

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Wed, 11 Dec 2019 19:56:56 +0100
From:   Matthias Brugger <matthias.bgg@...il.com>
To:     Bibby Hsieh <bibby.hsieh@...iatek.com>,
        Rob Herring <robh+dt@...nel.org>, CK HU <ck.hu@...iatek.com>
Cc:     devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org, srv_heupstream@...iatek.com,
        Nicolas Boichat <drinkcat@...omium.org>,
        Dennis-YC Hsieh <dennis-yc.hsieh@...iatek.com>
Subject: Re: [PATCH v17 6/6] arm64: dts: add gce node for mt8183



On 21/11/2019 02:54, Bibby Hsieh wrote:
> add gce device node for mt8183
> 
> Signed-off-by: Bibby Hsieh <bibby.hsieh@...iatek.com>
> ---

Applied to v5.5-next/dts64

Thanks!

>  arch/arm64/boot/dts/mediatek/mt8183.dtsi | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> index 6cbbd7726d36..954bcd766c97 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -9,6 +9,7 @@
>  #include <dt-bindings/interrupt-controller/arm-gic.h>
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/power/mt8183-power.h>
> +#include <dt-bindings/gce/mt8183-gce.h>
>  #include "mt8183-pinfunc.h"
>  
>  / {
> @@ -336,6 +337,15 @@
>  			status = "disabled";
>  		};
>  
> +		gce: mailbox@...38000 {
> +			compatible = "mediatek,mt8183-gce";
> +			reg = <0 0x10238000 0 0x4000>;
> +			interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_LOW>;
> +			#mbox-cells = <3>;
> +			clocks = <&infracfg CLK_INFRA_GCE>;
> +			clock-names = "gce";
> +		};
> +
>  		uart0: serial@...02000 {
>  			compatible = "mediatek,mt8183-uart",
>  				     "mediatek,mt6577-uart";
>