linux-kernel - Re: [PATCH 2/2] riscv: cacheinfo: Add support to determine no. of L2 cache way enabled

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Message-ID: <alpine.DEB.2.21.9999.1912151155010.64438@viisi.sifive.com>
Date:   Sun, 15 Dec 2019 11:56:23 -0800 (PST)
From:   Paul Walmsley <paul.walmsley@...ive.com>
To:     Palmer Dabbelt <palmerdabbelt@...gle.com>
cc:     yash.shah@...ive.com, robh+dt@...nel.org, mark.rutland@....com,
        aou@...s.berkeley.edu, bmeng.cn@...il.com, allison@...utok.net,
        alexios.zavras@...el.com, Atish Patra <Atish.Patra@....com>,
        tglx@...utronix.de, Greg KH <gregkh@...uxfoundation.org>,
        devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] riscv: cacheinfo: Add support to determine no. of
 L2 cache way enabled

On Fri, 13 Dec 2019, Palmer Dabbelt wrote:

> I thought the plan was to get this stuff out of arch/riscv?  It looks like it
> only got half-way done.

That's still the plan.  Will probably send that one upstream in v5.5-rc.  

Am not a huge fan of moving it to drivers/soc, for a few different 
reasons, but some people seem to feel very passionately about it.


- Paul