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Message-ID: <DB7PR04MB4618957D7423FFBAECD1EC7EE6530@DB7PR04MB4618.eurprd04.prod.outlook.com>
Date:   Wed, 18 Dec 2019 11:34:11 +0000
From:   Joakim Zhang <qiangqing.zhang@....com>
To:     Marc Zyngier <maz@...nel.org>
CC:     "tglx@...utronix.de" <tglx@...utronix.de>,
        "jason@...edaemon.net" <jason@...edaemon.net>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>,
        "s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
        "S.j. Wang" <shengjiu.wang@....com>,
        "kernel@...gutronix.de" <kernel@...gutronix.de>,
        "festevam@...il.com" <festevam@...il.com>,
        dl-linux-imx <linux-imx@....com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        Andy Duan <fugang.duan@....com>,
        Aisheng Dong <aisheng.dong@....com>
Subject: RE: [PATCH 1/3] dt-bindings/irq: add binding for NXP INTMUX
  interrupt multiplexer


> -----Original Message-----
> From: Joakim Zhang <qiangqing.zhang@....com>
> Sent: 2019年12月18日 18:22
> To: Marc Zyngier <maz@...nel.org>
> Cc: tglx@...utronix.de; jason@...edaemon.net; robh+dt@...nel.org;
> mark.rutland@....com; shawnguo@...nel.org; s.hauer@...gutronix.de; S.j.
> Wang <shengjiu.wang@....com>; kernel@...gutronix.de;
> festevam@...il.com; dl-linux-imx <linux-imx@....com>;
> linux-kernel@...r.kernel.org; devicetree@...r.kernel.org;
> linux-arm-kernel@...ts.infradead.org; Andy Duan <fugang.duan@....com>;
> Aisheng Dong <aisheng.dong@....com>
> Subject: RE: [PATCH 1/3] dt-bindings/irq: add binding for NXP INTMUX interrupt
> multiplexer
> 
> 
> > -----Original Message-----
> > From: Marc Zyngier <maz@...nel.org>
> > Sent: 2019年12月18日 17:45
> > To: Joakim Zhang <qiangqing.zhang@....com>
> > Cc: tglx@...utronix.de; jason@...edaemon.net; robh+dt@...nel.org;
> > mark.rutland@....com; shawnguo@...nel.org; s.hauer@...gutronix.de;
> S.j.
> > Wang <shengjiu.wang@....com>; kernel@...gutronix.de;
> > festevam@...il.com; dl-linux-imx <linux-imx@....com>;
> > linux-kernel@...r.kernel.org; devicetree@...r.kernel.org;
> > linux-arm-kernel@...ts.infradead.org; Andy Duan <fugang.duan@....com>;
> > Aisheng Dong <aisheng.dong@....com>
> > Subject: Re: [PATCH 1/3] dt-bindings/irq: add binding for NXP INTMUX
> > interrupt multiplexer
> >
> > On 2019-12-18 07:20, Joakim Zhang wrote:
> > > This patch adds the DT bindings for the NXP INTMUX interrupt
> > > multiplexer found in the i.MX8 family SoCs.
> > >
> > > Signed-off-by: Joakim Zhang <qiangqing.zhang@....com>
> > > ---
> > >  .../interrupt-controller/fsl,intmux.txt       | 34
> > > +++++++++++++++++++
> > >  1 file changed, 34 insertions(+)
> > >  create mode 100644
> > > Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.tx
> > > t
> > >
> > > diff --git
> > >
> > > a/Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.
> > > tx
> > > t
> > >
> > > b/Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.
> > > tx
> > > t
> > > new file mode 100644
> > > index 000000000000..be3c6848f36c
> > > --- /dev/null
> > > +++
> > > b/Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.
> > > tx
> > > t
> > > @@ -0,0 +1,34 @@
> > > +Freescale INTMUX interrupt multiplexer
> > > +
> > > +Required properties:
> > > +
> > > +- compatible: Should be:
> > > +	- "fsl,imx-intmux"
> > > +- reg: Physical base address and size of registers.
> > > +- interrupts: Should contain the parent interrupt lines (up to 8)
> > > used to
> > > +  multiplex the input interrupts.
> > > +- clocks: Should contain one clock for entry in clock-names.
> > > +- clock-names:
> > > +   - "ipg": main logic clock
> > > +- interrupt-controller: Identifies the node as an interrupt
> > > controller.
> > > +- #interrupt-cells: Specifies the number of cells needed to encode
> > > an
> > > +  interrupt source. The value must be 1.
> > > +
> > > +Optional properties:
> > > +
> > > +- fsl,intmux_chans: The number of channels used for interrupt
> > > source. The
> > > +  Maximum value is 8.
> > > +
> > > +Example:
> > > +
> > > +	intmux@...00000 {
> > > +		compatible = "fsl,imx-intmux";
> > > +		reg = <0x37400000 0x1000>;
> > > +		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
> > > +		clocks = <&clk IMX8QM_CM40_IPG_CLK>;
> > > +		clock-names = "ipg";
> > > +		interrupt-controller;
> > > +		#interrupt-cells = <1>;
> > > +		fsl,intmux_chans = <1>;
> > > +	};
> > > +
> >
> > What I don't understand is how the interrupt descriptor can indicate
> > which channel it is multiplexed on. The driver doesn't makes this
> > clear either, and I strongly suspect that it was never tested with more than a
> single channel...
> 
> Yes, to be frank, I tested with a signle channel, I will take this into
> consideration. Thanks.
Hi Marc,

I tested channels from 1 to 8, and no issue found.

We register irq handler with irq_set_chained_handler_and_data(), so the interrupt descriptor could find the controller's private data, and channel index is one part of private data.
I think this can explain the interrupt descriptor how to indicate which channel it is multiplexed.

> Best Regards,
> Joakim Zhang
> > Thanks,
> >
> >          M.
> > --
> > Jazz is not dead. It just smells funny...

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