lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Date:   Wed, 18 Dec 2019 11:49:12 +0000
From:   Marc Zyngier <maz@...nel.org>
To:     Joakim Zhang <qiangqing.zhang@....com>
Cc:     <tglx@...utronix.de>, <jason@...edaemon.net>, <robh+dt@...nel.org>,
        <mark.rutland@....com>, <shawnguo@...nel.org>,
        <s.hauer@...gutronix.de>, "S.j. Wang" <shengjiu.wang@....com>,
        <kernel@...gutronix.de>, <festevam@...il.com>,
        dl-linux-imx <linux-imx@....com>, <linux-kernel@...r.kernel.org>,
        <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        Andy Duan <fugang.duan@....com>,
        Aisheng Dong <aisheng.dong@....com>
Subject: RE: [PATCH 1/3] dt-bindings/irq: add binding for NXP INTMUX  interrupt multiplexer

On 2019-12-18 11:34, Joakim Zhang wrote:
>> -----Original Message-----
>> From: Joakim Zhang <qiangqing.zhang@....com>
>> Sent: 2019年12月18日 18:22
>> To: Marc Zyngier <maz@...nel.org>
>> Cc: tglx@...utronix.de; jason@...edaemon.net; robh+dt@...nel.org;
>> mark.rutland@....com; shawnguo@...nel.org; s.hauer@...gutronix.de; 
>> S.j.
>> Wang <shengjiu.wang@....com>; kernel@...gutronix.de;
>> festevam@...il.com; dl-linux-imx <linux-imx@....com>;
>> linux-kernel@...r.kernel.org; devicetree@...r.kernel.org;
>> linux-arm-kernel@...ts.infradead.org; Andy Duan 
>> <fugang.duan@....com>;
>> Aisheng Dong <aisheng.dong@....com>
>> Subject: RE: [PATCH 1/3] dt-bindings/irq: add binding for NXP INTMUX 
>> interrupt
>> multiplexer

[...]

>> > What I don't understand is how the interrupt descriptor can 
>> indicate
>> > which channel it is multiplexed on. The driver doesn't makes this
>> > clear either, and I strongly suspect that it was never tested with 
>> more than a
>> single channel...
>>
>> Yes, to be frank, I tested with a signle channel, I will take this 
>> into
>> consideration. Thanks.
> Hi Marc,
>
> I tested channels from 1 to 8, and no issue found.
>
> We register irq handler with irq_set_chained_handler_and_data(), so
> the interrupt descriptor could find the controller's private data, 
> and
> channel index is one part of private data.
> I think this can explain the interrupt descriptor how to indicate
> which channel it is multiplexed.

But that doesn't explain how the driver can find which channel a given
interrupts is wired to. Nothing in your binding shows how you can 
extract
the channel number from the interrupt descriptor. Nothing in the driver
even *computes* a channel number.

As far as I can see, you register a bunch of domains, all with the same
OF node, so all your interrupts end-up with the same domain. Is it 
really
what you expect?

This driver looks terribly wrong.

         M.
-- 
Jazz is not dead. It just smells funny...

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ