lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <BYAPR07MB511064CAE0E9B64564261643D22D0@BYAPR07MB5110.namprd07.prod.outlook.com>
Date:   Fri, 20 Dec 2019 08:04:58 +0000
From:   Yuti Suresh Amonkar <yamonkar@...ence.com>
To:     "robh@...nel.org" <robh@...nel.org>
CC:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "kishon@...com" <kishon@...com>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "jsarha@...com" <jsarha@...com>,
        "tomi.valkeinen@...com" <tomi.valkeinen@...com>,
        "praneeth@...com" <praneeth@...com>,
        Milind Parab <mparab@...ence.com>,
        Swapnil Kashinath Jakhade <sjakhade@...ence.com>
Subject: RE: [RESEND PATCH v1 02/15] dt-bindings:phy: Convert Cadence MHDP PHY
 bindings to YAML.

Hi,

> -----Original Message-----
> From: Rob Herring <robh@...nel.org>
> Sent: Friday, December 20, 2019 2:41
> To: Yuti Suresh Amonkar <yamonkar@...ence.com>
> Cc: linux-kernel@...r.kernel.org; devicetree@...r.kernel.org;
> kishon@...com; mark.rutland@....com; jsarha@...com;
> tomi.valkeinen@...com; praneeth@...com; Milind Parab
> <mparab@...ence.com>; Swapnil Kashinath Jakhade
> <sjakhade@...ence.com>
> Subject: Re: [RESEND PATCH v1 02/15] dt-bindings:phy: Convert Cadence
> MHDP PHY bindings to YAML.
> 
> EXTERNAL MAIL
> 
> 
> On Wed, Dec 11, 2019 at 02:09:07PM +0100, Yuti Amonkar wrote:
> 
> > - Convert the MHDP PHY devicetree bindings to yaml schemas.
> 
> > - Rename DP PHY to have generic Torrent PHY nomrnclature.
> 
> > - Rename compatible string from "cdns,dp-phy" to "cdns,torrent-phy".
> 
> 
> 
> You can't just change compatible strings. It's an ABI. Unless you know
> 
> for sure there are no users that would care.
> 

The driver has never been functional and therefore not used in any active use cases. We will update this in the commit description 
of next patch series.

> 
> 
> >
> 
> > Signed-off-by: Yuti Amonkar <yamonkar@...ence.com>
> 
> > ---
> 
> >  .../devicetree/bindings/phy/phy-cadence-dp.txt     | 30 ------------
> 
> >  .../bindings/phy/phy-cadence-torrent.yaml          | 57
> ++++++++++++++++++++++
> 
> >  2 files changed, 57 insertions(+), 30 deletions(-)
> 
> >  delete mode 100644 Documentation/devicetree/bindings/phy/phy-
> cadence-dp.txt
> 
> >  create mode 100644 Documentation/devicetree/bindings/phy/phy-
> cadence-torrent.yaml
> 
> >
> 
> > diff --git a/Documentation/devicetree/bindings/phy/phy-cadence-dp.txt
> b/Documentation/devicetree/bindings/phy/phy-cadence-dp.txt
> 
> > deleted file mode 100644
> 
> > index 7f49fd54e..0000000
> 
> > --- a/Documentation/devicetree/bindings/phy/phy-cadence-dp.txt
> 
> > +++ /dev/null
> 
> > @@ -1,30 +0,0 @@
> 
> > -Cadence MHDP DisplayPort SD0801 PHY binding
> 
> > -===========================================
> 
> > -
> 
> > -This binding describes the Cadence SD0801 PHY hardware included with
> 
> > -the Cadence MHDP DisplayPort controller.
> 
> > -
> 
> > --------------------------------------------------------------------------------
> 
> > -Required properties (controller (parent) node):
> 
> > -- compatible	: Should be "cdns,dp-phy"
> 
> > -- reg		: Defines the following sets of registers in the parent
> 
> > -		  mhdp device:
> 
> > -			- Offset of the DPTX PHY configuration registers
> 
> > -			- Offset of the SD0801 PHY configuration registers
> 
> > -- #phy-cells	: from the generic PHY bindings, must be 0.
> 
> > -
> 
> > -Optional properties:
> 
> > -- num_lanes	: Number of DisplayPort lanes to use (1, 2 or 4)
> 
> > -- max_bit_rate	: Maximum DisplayPort link bit rate to use, in Mbps
> (2160,
> 
> > -		  2430, 2700, 3240, 4320, 5400 or 8100)
> 
> > --------------------------------------------------------------------------------
> 
> > -
> 
> > -Example:
> 
> > -	dp_phy: phy@...b030a00 {
> 
> > -		compatible = "cdns,dp-phy";
> 
> > -		reg = <0xf0 0xfb030a00 0x0 0x00000040>,
> 
> > -		      <0xf0 0xfb500000 0x0 0x00100000>;
> 
> > -		num_lanes = <4>;
> 
> > -		max_bit_rate = <8100>;
> 
> > -		#phy-cells = <0>;
> 
> > -	};
> 
> > diff --git a/Documentation/devicetree/bindings/phy/phy-cadence-
> torrent.yaml b/Documentation/devicetree/bindings/phy/phy-cadence-
> torrent.yaml
> 
> > new file mode 100644
> 
> > index 0000000..4fa9d0a
> 
> > --- /dev/null
> 
> > +++ b/Documentation/devicetree/bindings/phy/phy-cadence-
> torrent.yaml
> 
> 
> 
> Normal file naming is using the compatible string.
> 
> 
> 
> > @@ -0,0 +1,57 @@
> 
> > +%YAML 1.2
> 
> > +---
> 
> > +$id: "https://urldefense.proofpoint.com/v2/url?u=http-
> 3A__devicetree.org_schemas_phy_phy-2Dcadence-2Dtorrent.yaml-
> 23&d=DwIBAg&c=aUq983L2pue2FqKFoP6PGHMJQyoJ7kl3s3GZ-
> _haXqY&r=xythEVTj32hrXbonw_U5uD9n5Dh9J7TTTznvmGAGKo4&m=9-
> kyiRknYkYa5DqMjgD8NdzvcteoR6ElMbozga1HYMw&s=R0d1BN7TnO9WvU1
> Wd1msGE7rObNLWn_xhVoW247Ggu0&e= "
> 
> > +$schema: "https://urldefense.proofpoint.com/v2/url?u=http-
> 3A__devicetree.org_meta-2Dschemas_core.yaml-
> 23&d=DwIBAg&c=aUq983L2pue2FqKFoP6PGHMJQyoJ7kl3s3GZ-
> _haXqY&r=xythEVTj32hrXbonw_U5uD9n5Dh9J7TTTznvmGAGKo4&m=9-
> kyiRknYkYa5DqMjgD8NdzvcteoR6ElMbozga1HYMw&s=uIcZwMHgTJIbhKM1q
> hWr_-4NoZWn5KaohCrVBA28Ruk&e= "
> 
> > +
> 
> > +title: Cadence Torrent SD0801 PHY binding for DisplayPort
> 
> > +
> 
> > +description:
> 
> > +  This binding describes the Cadence SD0801 PHY hardware included with
> 
> > +  the Cadence MHDP DisplayPort controller.
> 
> > +
> 
> > +maintainers:
> 
> > +  - Swapnil Jakhade <sjakhade@...ence.com>
> 
> > +  - Yuti Amonkar <yamonkar@...ence.com>
> 
> > +
> 
> > +properties:
> 
> > +  compatible:
> 
> > +    const: cdns,torrent-phy
> 
> > +
> 
> > +  reg:
> 
> > +    items:
> 
> > +      - description: Offset of the DPTX PHY configuration registers.
> 
> > +      - description: Offset of the SD0801 PHY configuration registers.
> 
> > +
> 
> > +  "#phy-cells":
> 
> > +    const: 0
> 
> > +
> 
> > +  num_lanes:
> 
> > +    description:
> 
> > +      Number of DisplayPort lanes.
> 
> > +    allOf:
> 
> > +      - $ref: /schemas/types.yaml#/definitions/uint32
> 
> > +      - enum: [1, 2, 4]
> 
> > +
> 
> > +  max_bit_rate:
> 
> > +    description:
> 
> > +      Maximum DisplayPort link bit rate to use, in Mbps
> 
> > +    allOf:
> 
> > +      - $ref: /schemas/types.yaml#/definitions/uint32
> 
> > +      - enum: [2160, 2430, 2700, 3240, 4320, 5400, 8100]
> 
> > +
> 
> > +required:
> 
> > +  - compatible
> 
> > +  - reg
> 
> > +  - "#phy-cells"
> 
> > +
> 
> > +examples:
> 
> > +  - |
> 
> > +    dp_phy: phy@...b030a00 {
> 
> > +          compatible = "cdns,torrent-phy";
> 
> > +          reg = <0xf0 0xfb030a00 0x0 0x00000040>,
> 
> > +                <0xf0 0xfb500000 0x0 0x00100000>;
> 
> > +          num_lanes = <4>;
> 
> > +          max_bit_rate = <8100>;
> 
> > +          #phy-cells = <0>;
> 
> > +    };
> 
> > +...
> 
> > --
> 
> > 2.7.4
> 
> >

Thanks & Regards 
Yuti Amonkar

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ